【正文】 一些類型的串行口單元允許CPU 與外部設備進行串口通信，用串口位代替平行位進行通信需要少許的I/O 口，這樣使通信費用降低但速度也相對慢些。當微機要與只有打開或關閉操作的設備相連時，這種數(shù)字形式是最有用的，這里每一位都可表示一開關或執(zhí)行器的狀態(tài)。最后，信號經調理（通常是放大）以形成適應于執(zhí)行器操作的形式。這種情況下，信號調理單元必須將輸入信號變換成為另一信號，也可直接與接口的下一部分，即微計算機本身的輸入輸出單元相連接。在計算機之外，由電子系統(tǒng)所處理的信息以一種物理信號形式存在，但在程序中，它是用數(shù)字表示的。(032H) = FFH 聲明為12V 編程電壓。:89C51 單片機內有3 個簽名字節(jié),地址為030H、031H 和032H。數(shù)據(jù)查詢89C51 單片機用數(shù)據(jù)查詢方式來檢測一個寫周期是否結束，在一個寫周期中，如需要讀取最后寫入的那個字節(jié)，則讀出的數(shù)據(jù)的最高位（）是原來寫入字節(jié)的最高位的反碼。每對Flash 存儲陣列寫入一個字節(jié)或每寫入一個程序加密位，加上一個ALE/PROG 編程脈沖。2 編程方法編程前，設置好地址、數(shù)據(jù)及控制信號，編程單元的地址加在P1 口和P2 —（11 位地址范圍為0000H——0FFFH），數(shù)據(jù)從P0口輸入，、 、 的電平設置見表6，PSEB 為低電平，RST保持高電平，EA/Vpp 引腳是編程電源的輸入端，按要求加上編程電壓，ALE/PROG引腳輸入編程脈沖（負脈沖）。10 Pf，而如使用陶瓷諧振器建議選擇40Pf177。89C51 中有一個用于構成內部振蕩器的高增益反相放大器，引腳XTAL1 和XTAL2分別是該放大器的輸入端和輸出端。欲使CPU 僅訪問外部程序存儲器（地址為0000H—FFFFH），EA 端必須保持低電平（接地）。PSEN：程序存儲允許輸出是外部程序存儲器的讀選通型號，當89C51 由外部存儲器取指令（或數(shù)據(jù)）時，每個機器周期兩次PSEN 有效，即輸出兩個脈沖。如有必要，可通過對特殊功能寄存器（SFR）區(qū)中的8EH 單元D0 位置位，可禁止ALE 操作。ALE/PROG：當訪問外部程序存儲器或數(shù)據(jù)存儲器時，ALE（地址鎖存允許）輸出脈沖用于鎖存地址的低8 位字節(jié)。P3 口：P3 是一個帶有內部上拉電阻的8 位雙向I/O 口，P3 的輸出緩沖級可驅動（吸收或輸出電流）4 個TTL 邏輯門電路。作為輸入口使用時，因為內部存在上拉電阻，某個引腳被外部信號拉低時會輸出一個電流（IIL）。Flash 編程和程序校驗期間，P1 接受低8 位地址。P0 口：P0 口是一組8 位漏極開路型雙向I/O 口，也即地址/數(shù)據(jù)總線復用。掉電方式保存RAM 中的內容，但振蕩器體制工作并禁止其他所有不見工作直到下一個硬件復位。系統(tǒng)的類型和應用需求決定了能夠在設備上執(zhí)行的測試類型。另外，部件的替代品領域是極其昂貴的，因為設備要用來把模塊典型地焊接成一個總體的價值比各個部件高幾倍。由于這些決定性應用，市場需要一種可靠的具有低干擾潛伏響應的費用效能控制器，服務大量時間和事件驅動的在實時應用需要的集成外圍的能力，具有在單一程序包中高出平均處理功率的中央處理器。MCS51 單片機典型的應用是高速事件控制系統(tǒng)。這種環(huán)境的目標不僅是為AT89C51 汽車單片機提供一種健壯測試環(huán)境，而且開發(fā)一種能夠容易擴展并重復用來驗證其他幾種將來的單片機。這些單片機的高速處理速度和增強型外圍設備集合使得它們適合于這種高速事件應用場合。AT89C51的概況The General Situation of AT89C51Chapter 1 The application of AT89C51Microcontrollers are used in a multitude of mercial applications such as modems, motorcontrol systems, air conditioner control systems, automotive engine and among others. The high processing speed and enhanced peripheral set of these microcontrollers make them suitable for such highspeed eventbased applications. However, these critical application domains also require that these microcontrollers are highly reliable. The high reliability and low market risks can be ensured by a robust testing process and a proper tools environment for the validation of these microcontrollers both at the ponent and at the system level. Intel Plaform Engineering department developed an objectoriented multithreaded test environment for the validation of its AT89C51 automotive microcontrollers. The goals of thisenvironment was not only to provide a robust testing environment for the AT89C51 automotive microcontrollers, but to develop an environment which can be easily extended and reused for the validation of several other future microcontrollers. The environment was developed in conjunction with Microsoft Foundation Classes (AT89C51). The paper describes the design and mechanism of this test environment, its interactions with various hardware/software environmental ponents, and how to use AT89C51. IntroductionThe 8bit AT89C51 CHMOS microcontrollers are designed to handle highspeedcalculations and fast input/output operations. MCS 51 microcontrollers are typically used for highspeed event control systems. Commercial applications include modems,motorcontrol systems, printers, photocopiers, air conditioner control systems, disk drives,and medical instruments. The automotive industry use MCS 51 microcontrollers in enginecontrol systems, airbags, suspension systems, and antilock braking systems (ABS). The AT89C51 is especially well suited to applications that benefit from its processing speed and enhanced onchip peripheral functions set, such as automotive powertrain control, vehicle dynamic suspension, antilock braking, and stability control applications. Because of these critical applications, the market requires a reliable costeffective controller with a low interrupt latency response, ability to service the high number of time and event driven integrated peripherals needed in real time applications, and a CPU with above average processing power in a single package. The financial and legal risk of having devices that operate unpredictably is very high. Once in the market, particularly in mission criticalapplications such as an autopilot or antilock braking system, mistakes are financiallyprohibitive. Redesign costs can run as high as a $500K, much more if the fix means 2 back annotating it across a product family that share the same core and/or peripheral design flaw. In addition, field replacements of ponents is extremely expensive, as the devices are ty