【正文】 s clock distribution. The clock distribution is usually balanced so that the clock arrives at every endpoint simultaneously. One of those endpoints is the PLL39。s stability).An early mechanical version of a phaselocked loop was used in 1921 in the ShorttSynchronome clock.Structure and functionPhaselocked loop mechanisms may be implemented as either analog or digital circuits. Both implementations use the same basic structure. Both analog and digital PLL circuits include four basic elements:˙Phase detector,˙Lowpass filter,˙Variablefrequency oscillator, and˙feedback path (which may include a frequency divider).Performance parameters˙Type and order˙Lock range: The frequency range the PLL is able to stay locked. Mainly defined by the VCO range.˙Capture range: The frequency range the PLL is able to lockin, starting from unlocked condition. This range is usually smaller than the lock range and will depend . on phase detector.˙Loop bandwidth: Defining the speed of the control loop.˙Transient response: Like overshoot and settling time to a certain accuracy (like 50ppm).˙Steadystate errors: Like remaining phase or timing error˙Output spectrum purity: Like sidebands generated from a certain VCO tuning voltage ripple.˙Phasenoise: Defined by noise energy in a certain frequency band (like 10kHz offset from carrier). Highly dependent on VCO phasenoise, PLL bandwidth, etc.˙General parameters: Such as power consumption, supply voltage range, output amplitude, etc.ApplicationsPhaselocked loops are widely used for synchronization purposes。m I3T are able to manage the integration at a reasonable cost. A typical application diagram of a real mixedsignal SoC is shown in Figure .Figure Mixedsignal SoC diagramBasically, the chip integrates the system functionality from the sensor to the actuator, going through some digital processing. Conventional mixedsignal technology allows analog control and signal processing functions such as amplifiers, analogtodigital converters (ADCs) and filters to be bined with digital functionality such as microcontrollers, memory, timers and logic control functions on a single, customized chip. All signals that process an algorithm or arithmetic calculation are digital, so conversion of analog to digital signals is mandatory when submitting data for parison or processing by via a microcontroller, while conversion from digital output signals to analog highvoltage signals is required to drive an actuator or a load. The most recent mixedsignal technology AMIS developed, significantly simplifies the implementation of such driver functionality by allowing much higher voltage functionality to be integrated into an IC alongside the relatively low voltages required for conventional mixedsignal functions. This highvoltage mixedsignal technology is particularly relevant to automotive electronics applications where higher voltage outputs — to drive a motor or actuate a relay — need to be bined with analog signal conditioning functions and plex digital processing.A growing trend in mixedsignal circuit design is to add some type of central processing circuit to the analog circuits. For many applications the suitable choice of processing intelligence is an 8bit microcontroller core such as an 8051 or 6502. 8 bits remains the most popular choice as this type of SoC is not intended to replace plex highend central microcontrollers but more decentralized or slave applications such as sensor conditioning circuitry with local (as close to the sensor as possible) simple intelligence to control relays or motors. An automotive example would be the lateral actuation of a car’s headlamps when the steering wheel is turned to improve the driver’s safety and improve field of vision. The sensor input would e from the steering angle via a serial link (most of the time with a LIN or I2C protocol) and the SoC would be close to the motor with an onboard set of algorithms to mand the motor’s movement.For higher end applications that require more calculation power, the move to ARM processors is possible. This creates a highend solution (up to date for the mature markets) which could last over the application’s lifespan because the microcontroller would be a small part of an integrated circuit that emulates the module’s functionalities.In order to understand how larger geometries can be better suited for some mixedsignal applications, one needs to understand all of the characteristics involved. Below we will discuss seven key characteristics, however this is by no means prehensive.Gate and memory size in mixedsignal applications generally drive cost. Gate and memory size drive cost because most mixedsignal devices are core limited. This can be quite different than an alldigital circuit. Many times, the alldigital device will have so many I/Os that the number of pads on the device determines the periphery and therefore the area. This is rarely the case for mixedsignal devices. For the most part digital cells scale pretty closely to the expected area savings. One would expect a cell to be 51 percent smaller than a cell of equivalent function. This is illustrated by the following formula: While this holds for digital cells we will see that analog cells are quite a different story. Therefore the amount of digital content (including memory) is the key in determining the best technology for the application.2. Parasitic lessens as the geometry decreases. This is good news for both the digital and analog designer. Understandably this will translate into high bandwidths and data rates. While the magnitude of the parasitic capacitance per gate or resistance of the interconnection is most assuredly lower as geometry decreases, it is also less predictable. This can cause analog modeling problems and highlights the need for careful understanding of the parasitic.3. The transconductance characteristic is the relationship bet