外文翻譯--微型計算機的數(shù)字音頻接口processor-based數(shù)據(jù)記錄系統(tǒng)-wenkub.com
2025-05-07 06:54 本頁面
【正文】 s data recording system and the model PC/XT microputer (IBM Instruments Inc., IBM Corp., Danbury, CT). The interface described herein is capable of retrieving the same interval of data repeatedly and of retrieving contiguous intervals. The latter capability allows analysis of single channel records which greatly exceed in duration the data storage capacity of the puter(6 s data per 512 kbytes memory). Our interface consists of a switch box that selects the left or right channel for sampling, a plugin puter board that multiplexes the 16bit data for transfer on the 8bit puter data bus, and an assembly language subroutine that controls the video cassette recorder (VCR) and directs storage of data in sequential memory locations. Two functional modes are available. In the interactive mode the VCR is started and the data array is filled repetitively until a key is pressed. The video tape is then rewound to a position 20 s before the beginning of the collected data. In the automatic mode the calling program provides a marker of 42 sequential, previously sampled data points. The VCR is started and ining data are pared with a portion of this marker. If a match is found the data array is filled with the data that immediately follow the marker. The video tape is then rewound to a position 20 s before the beginning of the data and control returns to the calling program. If no match is found within an adjustable period of playback (1 min to h), the video tape is rewound60 s and the subroutine returns a flag which indicates that data collection was not successful. If the last 42 data points of each record are used as the marker for the next record, sequential subroutine calls in the automatic mode will yield retrieval of contiguous blocks of data. Although the interface we describe is hardware specific to our instruments and puter, adaptation to other equipment should be straightforward. However, speed limitations of the 8255 interface chip appear to preclude use of this particular interface with IBM ATtype puters that operate at a 68 MHz clock speed. Our interface hardware is depicted in Fig. 1. Total cost for the puter board and additional ponents is $150. The digital output stage designed by Bezanilla provides word clocks for the right and left data channels and 16 parallel data lines. In our digital audio processor (DASS 501。雜志。 作者將很高興提供感興趣的讀者與磁盤拷貝的列在圖二子程序和它的組裝目標(biāo)代碼。我們也觀察到的唯一缺陷測試接口調(diào)用子程序偶爾的失敗來偵測標(biāo)記。代碼 C6 C7 = 00,03,和 10 個激活玩 ,停止 ,收、功能 ,分別。 此后 ,點中存儲的數(shù)據(jù)的數(shù)組。如果一個總找到匹配的數(shù)據(jù)收藏是開始。這在比較了兩個階段。檢測鍵盤條目是經(jīng)由函數(shù)調(diào)用磁盤的時間操作系統(tǒng) (DOS 操作系統(tǒng) )。這然后輸入一個字 ,微機登記儲存在記憶中。一個簡要介紹了算法也緊隨其后。 宏匯編源代碼圖 2為控制界面。背面板及連接桿地面和。切除 + 5 V 遠(yuǎn)銷 18的要求兩個邊路的切割痕跡頂部和方法 37pin底部連接組件的一面板和安裝一個跳投 ,把比分重新這些兩個 + 5 V 痕跡。該板包含一位 8255 可編程外圍接口芯片 (英特爾公司、圣克拉拉、 CA),一個數(shù)據(jù)總線緩沖區(qū) ,和一個地址譯碼器。 8255 年設(shè)定每一個 16 位數(shù)據(jù)轉(zhuǎn)換成詞兩個 8 字在電腦上轉(zhuǎn)移公共汽車。點對點的線路連接在盒子里一個 37pin 數(shù)據(jù)線路接頭安裝在對面盒 ,連接到一個時鐘線渠道的選擇開關(guān)、控制線路和線路從37pin 錄像機連接器連接到一個六角五接頭。這所設(shè)計的數(shù)字輸出階段 Bezanilla 提供的話時鐘左眼和右眼的數(shù)據(jù)通道和 16 個平行數(shù)據(jù)線路。 雖然我
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