【正文】
ATS Translation Completion ? Either updates its ATC to reflect the translation ? Or notes that a translation does not exist. ? The Function generates subsequent requests using ? either a translated address ? or an untranslated address based on the results of the Completion. SRIOV Architecture Supporting SRIOV Capability ARI – Alternative Routing ID Interpretation ACS – Access Control Services ATS – Address Translation Service Data Path for Ining Packets Data Path for ining packets 1. The Ether packet arrives at the Ether NIC 2. The packet is sent to the Layer 2 sorter/switch/classifier ? This Layer 2 sorter is configured by the Master Driver. When either the MD or the VF Driver configure a MAC address or VLAN, this Layer 2 sorter is configured. Data Path for ining packets 3. After being sorted by the Layer 2 Switch, the packet is placed into a receive queue dedicated to the target VF. 4. The DMA operation is initiated. The target memory address for the DMA operation is defined within the descriptors in the VF, which have been configured by the VF driver within the VM. Data Path for ining packets 5. The DMA Operation has reached the chipset. Intel VTd, which has been configured by the VMM then remaps the target DMA address from a virtual host address to a physical host address. The DMA operation is pleted。 the Ether packet is now in the memory space of the VM 6. The NIC fires interrupt, indicating a packet has arrived. This interrupt is handled by the VMM Data Path for ining packets 7. The VMM fires a virtual interrupt to the VM, so that it is informed that the packet has arrived Summary ? SRIOV creates Virtual Function, which records the information of the virtual PCIe device and be directly mapped to a system image. ? Virtual Function is a “l(fā)ight weight” function just for data movement. The management is controlled by Physical Function. ? ATC, a hardware stores recently used address translations ? ARI, a mechanism to allow single PCIe ponent to support up to 256 functions. And Routing ID is used to forward requests to the corresponding PFs and VFs. ? ATS, a mechanism allowing a virtual machine to perform DMA transaction directly to and from a PCIe endpoint ? In the end, a example show up the data path for the ining packets. Reference ? Intel PCISIG SRIOV Primer ? “SRIOV Networking in Xen: Architecture, Design and Implementation” Yaozu Dong, Zhao Yu and Greg Rose ? Single Root I/O Virtualization and Sharing Specification Revision ? Address Translation Services Revision ? “Implementing PCI I/O Virtualization Standards”, Mike Krause and Renato Recio ? PCI SIG IOV Work Group Cochairs ? 0(4th%20Edition).pdf ? oc_id=4717c70ea2fe2f92dcbc4560a39cba8129af32c1 ? ? Q amp。 A