【正文】 頭開(kāi)始學(xué)，對(duì)知識(shí)了解的局限性，使得這個(gè)倒計(jì)時(shí)系統(tǒng)在功能上不完善，對(duì)開(kāi)發(fā)有一定的影響，懇請(qǐng)各位老師原諒！致 謝在本次畢業(yè)設(shè)計(jì)過(guò)程中，我學(xué)到了很多東西，也接觸到了一些以前沒(méi)有遇到過(guò)的問(wèn)題，在不停的解決問(wèn)題的時(shí)候真是受益頗多！在這里，我首先要感謝我尊敬的劉雙臨導(dǎo)師，在畢業(yè)設(shè)計(jì)的這2個(gè)多月的時(shí)間里，從設(shè)計(jì)選題到整個(gè)論文的完成，無(wú)不凝聚著劉老師的汗水與心血。劉老師要指導(dǎo)很多同學(xué)的畢業(yè)設(shè)計(jì)，加上本來(lái)教學(xué)任務(wù)和科研項(xiàng)目，無(wú)論他工作量有多大，可總是還在百忙之中抽出大量的時(shí)間來(lái)指導(dǎo)我們。無(wú)論何時(shí)我們有疑問(wèn)，他總是抽出時(shí)間為我們解答。他身上散發(fā)出淵博的專業(yè)知識(shí)，精益求精的工作作風(fēng)，寬以待人的崇高風(fēng)范，將成為我以后再社會(huì)上工作、學(xué)習(xí)的榜樣。在我的畢業(yè)設(shè)計(jì)論文期間，老師為我提供了各種專業(yè)知識(shí)上的指導(dǎo)，他時(shí)常關(guān)注我的進(jìn)展情況，給出一些創(chuàng)造性的建議。如果沒(méi)有劉老師幫助和關(guān)懷，我不會(huì)這么順利的完成畢業(yè)設(shè)計(jì)和論文寫作。在此我要再一次向我的導(dǎo)師——?jiǎng)㈦p臨老師表示深深的感謝和崇高的敬意，謝謝您！同時(shí)，我還要感謝我的輔導(dǎo)員劉鴻老師、我的同學(xué)和朋友們。在整個(gè)設(shè)計(jì)和論文的寫作過(guò)程中，劉鴻老師給了我很多論文寫作的建議和意見(jiàn)，我的很多和朋友們幫著查資料、一起討論問(wèn)題也給我?guī)?lái)了很多幫助，受到了很大的啟發(fā)。在他們的幫助下，我才順利的完成了畢業(yè)設(shè)計(jì)和論文寫作。最后，我要特別的感謝我的家人對(duì)我無(wú)時(shí)無(wú)刻的支持和關(guān)懷，讓我不斷的走向成功，不斷的去實(shí)現(xiàn)人生的價(jià)值！參考文獻(xiàn)[1] .[2] 馬家辰. 孫玉德. 張穎. MCS—51單片機(jī)原理及接口技術(shù)（修訂版）．哈爾濱工業(yè)大學(xué)出版社．2004[3] 李光飛. 樓然苗. 胡佳文. 謝象佐. 單片機(jī)課程設(shè)計(jì)實(shí)例指導(dǎo). 北京航空航天大學(xué)出版社. 2004[4] 張培仁. 張志堅(jiān). 高修峰. 十六位單片微處理器原理及應(yīng)用（凌陽(yáng)SPCE061A）. 清華大學(xué)出版社. 2005[5] 李廣第． 單片機(jī)基礎(chǔ)． 第1版．北京：北京航空航天大學(xué)出版社，1999[6] 石東新. 溫淑鴻. 單片機(jī)原理與應(yīng)用實(shí)驗(yàn)指導(dǎo)書. 中國(guó)傳媒大學(xué). 信息工程學(xué)院[7] 魯云飛. 任志祿等. 51單片機(jī)在全自動(dòng)倒計(jì)時(shí)控制器中的應(yīng)用. 沈陽(yáng)建筑工程學(xué)院學(xué)報(bào)（自然科學(xué)版）. 2002年1月第18卷第1期[8] PDF文檔. 單片機(jī)開(kāi)發(fā)與典型運(yùn)用設(shè)計(jì)[9] 郭天祥. PPT. 十天學(xué)會(huì)單片機(jī)和C語(yǔ)言[10] 何立民．從Cygnal 80C51F看8位單片機(jī)發(fā)展之路． 單片機(jī)與嵌入式系統(tǒng)應(yīng)用，2002年，第5期[11] 張志良編著.《單片機(jī)原理與控制技術(shù)》.第2版. 機(jī)械工業(yè)出版社[12] 貴國(guó)慶. 單片機(jī)學(xué)習(xí)開(kāi)發(fā)系統(tǒng)應(yīng)用之三——4*[13] 劉定良. 用AT89C2051設(shè)計(jì)的秒倒計(jì)時(shí)器. 長(zhǎng)沙民政職業(yè)技術(shù)學(xué)院學(xué)報(bào). 第12卷第1期. 2005[14] 劉文奇. 基于單片機(jī)的電子倒計(jì)時(shí)器設(shè)計(jì). 重慶電子工程職業(yè)學(xué)院. 2009[15] [16] [17] Atmed Corporation1Microcontroller Data Book[M] . [18] Maurice Wilkes. Prestige Lecture delivered to IEE,Cambridge,on 5 February 2004. Comuptuter Laboratory. University of Cambridge[19] AT89C51 DATA SHEEP Philips Semiconductors 附 錄一、英文原文The HardwareOverviewThe 8051 family of micro controllers is based on an architecture which is highly optimized for embedded ontrol systems. It is used in a wide variety of applications from military equipment to automobiles to the keyboard on your PC. Second only to the Motorola 68HC11 in eight bit processors sales, the 8051 family of microcontrollers is available in a wide array of variations from manufacturers such as Intel, Philips, and Sie mens. These manufacturers have added numerous features and peripherals to the 8051 such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated of the 8051 with clock speeds up to 40MHz and voltage requirements down to volts are wide range of parts based on one core makes the 8051 family an excellent choice as the base architecture for a pany39。s entire line of products since it can perform many functions and developers will only have to earn this one platform.The basic architecture consists of the following features:an eight bit ALU32 descrete I/O pins (4 groups of 8) which can be individually accessedtwo 16 bit timer/counters full duplex UART.6 interrupt sources with 2 priority levels.128 bytes of on board RAM.separate 64K byte address spaces for DATA and CODE memory.One 8051 processor cycle consists of twelve oscillator of the twelve oscillator periods is used for a special function by the 8051 core such as op code fetches and samples of the interrupt daisy chain for pending time required for any 8051 instruction can be puted by dividing the clock frequency by 12, inverting that result and multiplying it by the number of processor cycles required by the instruction in , if you have a system which is using an clock, you can pute the number of instructions per second by dividing this value by gives aninstruction frequency of 921583 instructions per this will provide the amount of time taken by each instruction cycle ( microseconds).Memory OrganizationThe 8051 architecture provides the user with three physically distinct memory spaces which can be seen in Figure A 1. Each memory space consists of contiguous addresses from 0 to the maximum size, in bytes, of the memory space. Address overlaps are resolved by utilizing instructions which refer specifically to a given address space. The three memory spaces function as described below.Figure A 1 8051 Memory ArchitectureThe CODE SpaceThe first memory space is the CODE segment in which the executable program segment can be up to 64K (since it is addressed by 16 address lines) .The processor treats this segment as read only and will generate signals appropriate to access a memory device such as an , this does not mean that the CODE segment must be implemented using an embedded systems these days are using EEPROM which allows the memory to be overwritten either by the 8051 itself or by an external makes upgrades to the product easy to do since new software can be downloaded into the EEPROM rather than having to sassemble it and install a new EPROM. Additionally, battery backed SRAMs can be used in place of an EPROM. This method offers the same capability to upload new software to the unit as does an EEPROM, and does not have any sort of read/write cycle limitations such as an EEPROM has. However, when the battery supplying the RAM eventually dies, so does the software in an SRAM in place of an EPROM in development systems allows for rapid downloading of new code into the target this can be done, it helps avoid the cycle of programming /testing /erasing with EPROMs, and can also help avoid hassles over an in circuit emulator which is usually a rare modity.In addition to executable code, it is mon practice with the 8051 to store fixed lookup tables in the CODE segment. To facilitate this, the 8051 provides instructions which allow rapid access to tables via the data pointer (DPTR) or the program counter with an offset into the table optionally provided by the means that oftentimes, a table39。s base address can be loaded in DPTR and the element of the table to access can be held in the addition is performed by the 8051 during the execution of the instruction which can save many cycles depending on the situation. The DATA SpaceThe second memory space is the 128 bytes of internal RAM on the 8051, or the first 128 bytes of internal RAM on the segment is typically referred to as the DAT