基于單片機(jī)ds18b20的數(shù)字溫度計(jì)中英文獻(xiàn)翻譯-資料下載頁
2025-06-25 14:07本頁面
【正文】 s is as shown:ROM1 00110101...ROM2 10101010...ROM3 11110101...ROM4 00010001...The search process is as follows:1. The bus master begins the initialization sequence by issuing a reset pulse. The slave devices respond by issuing simultaneous presence pulses.2. The bus master will then issue the Search ROM mand on the 1Wire bus.3. The bus master reads a bit from the 1Wire bus. Each device will respond by placing the value of the first bit of their respective ROM data onto the 1Wire bus. ROM1 and ROM4 will place a 0 onto the 1Wire bus, ., pull it low. ROM2 and ROM3 will place a 1 onto the 1Wire bus by allowing the line to stay high. The result is the logical AND of all devices on the line, therefore the bus master sees a 0. The bus master reads another bit. Since the Search ROM data mand is being executed,all of the devices on the 1Wire bus respond to this second read by placing the plement of the first bit of their respective ROM data onto the 1Wire bus. ROM1 and ROM4 will place a 1 onto the 1Wire, allowing the line to stay high. ROM2 and ROM3 will place a 0 onto the 1Wire, thus it will be pulled low. The bus master again observes a 0 for the plement of the first ROM data bit. The bus master has determined that there are some devices on the 1Wire bus that have a 0 in the first position and others that have a 1. The data obtained from the two reads of the threestep routine have the following interpretations:4. The bus master writes a 0. This deselects ROM2 and ROM3 for the remainder of this search pass,leaving only ROM1 and ROM4 connected to the 1Wire bus.5. The bus master performs two more reads and receives a 0bit followed by a 1bit. This indicates that all devices still coupled to the bus have 0s as their second ROM data bit.6. The bus master then writes a 0 to keep both ROM1 and ROM4 coupled.7. The bus master executes two reads and receives two 0bits. This indicates that both 1bits and 0bits exist as the 3rd bit of the ROM data of the attached devices.8. The bus master writes a 0bit. This deselects ROM1, leaving ROM4 as the only device stillconnected.9. The bus master reads the remainder of the ROM bits for ROM4 and continues to access the part ifdesired. This pletes the first pass and uniquely identifies one part on the 1Wire bus.10. The bus master starts a new ROM search sequence by repeating steps 1 through 7.11. The bus master writes a 1bit. This decouples ROM4, leaving only ROM1 still coupled.12. The bus master reads the remainder of the ROM bits for ROM1 and municates to the underlying logic if desired. This pletes the second ROM search pass, in which another of the ROMs was found.13. The bus master starts a new ROM search by repeating steps 1 through 3.NOTE:The bus master learns the unique ID number (ROM data pattern) of one 1Wire device on each ROMSearch operation. The time required to derive the part’s unique ROM code is:960 236。s + (8 + 3 x 64) 61 236。s = msThe bus master is therefore capable of identifying 75 different 1Wire devices per seco
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鄂ICP備17016276號-1