【正文】
Flash Prog (pass) Flash Prog (Failure) On failure, the process is stopped, and an indication about the place where the error occurred (failing address) is given. PLD Prog PLD Prog (pass) Status of a programming action is given. In the case of the programming of a JEDEC file, the “bitmap” of the JEDEC file can be pared with the “bitmap” inside the PLD, and erroneous bits can be displayed. PLD Prog (Failure) 一 . Infra 開(kāi)發(fā)方塊圖 : JTAG開(kāi)發(fā)簡(jiǎn)單方塊圖 BTPG (引擎) Net List(CAD) .JTN BSDL(BSD) .DSH .SEL (DSH Location) .GEN PIL(Parts Information List) RUN JTAG開(kāi)發(fā) ? 關(guān)于 JTAG的開(kāi)發(fā),后面列出了 JTAG開(kāi)發(fā)方框圖。每一個(gè)開(kāi)發(fā)項(xiàng)目都是由幾個(gè)固定文件組成,然后驅(qū)動(dòng) BTPG引擎,再經(jīng)過(guò)編繹,運(yùn)行。就可完成一個(gè)開(kāi)發(fā)。 ? 值得注意的是,開(kāi)發(fā)人員必須熟悉所測(cè)試電路元件的連接關(guān)系并加以定義,查閱芯片的資料,在開(kāi)發(fā)過(guò)程中還要借助設(shè)計(jì)人員所提供的文檔加以整合。 JTAG開(kāi)發(fā)簡(jiǎn)單方塊圖 二 . Interconnection 開(kāi)發(fā)方塊圖 BTPG_I .NIF (Net Information File) .DIF(Device Information File) .BIL (BS Information List) ECN .APL BSX Compiler 若 .APL有問(wèn)題 ,則要重新改 :.NIF,.DIF,.BIL JTAG開(kāi)發(fā)簡(jiǎn)單方塊圖 三 . Memory Cluster 開(kāi)發(fā)方塊圖: BTPG_M .NIF (Net Information File) .MCD(Memory Cluster Definition) .BIL (BS Information List) .APL BSX Compiler SDE SLF JTAG開(kāi)發(fā)簡(jiǎn)單方塊圖 四 . Cluster 開(kāi)發(fā)方塊圖 : BTPG_C .NIF (Net Information File) .SDF (Signal Definition File) .BIL (BS Information List) .APL BSX Compiler .SLF (Signal Level File) AND A B C SDF: A 1 I B 2 I C 3 O JTAG開(kāi)發(fā)簡(jiǎn)單方塊圖 五 . Flash Programmer 開(kāi)發(fā)方塊圖 : BTPG .NIF (Net Information File) .FSH(Flash Data Sheet) .FSH SEL .APL BSX Compiler JTAG開(kāi)發(fā)簡(jiǎn)單方塊圖 六 . PLD Programmer 開(kāi)發(fā)方塊圖 : BTPG .NIF (Net Information File) .SVF JEDEC IEEE 1532 .BIL (BS Information List) .PRG RUN Thank !