【導(dǎo)讀】課題基于單片機(jī)的火災(zāi)自動(dòng)報(bào)警系統(tǒng)

　　

【正文】 n Casselgren, Mikael Sjodahl,and James spectral response from covered OPTICS,20xx(20):42774288 [8] 劉俊，張斌珍 .微弱信號(hào)檢測(cè)技術(shù) .北京 :電子工業(yè)出版社 ,20xx [9] 李遠(yuǎn)明，陳文濤 .微弱光信號(hào)前置放大電路設(shè)計(jì) .設(shè)計(jì)參考 ,20xx(8):5153 [10] 孫紅兵 ,莫永新 .微弱光電信號(hào)檢測(cè)電路設(shè)計(jì) 20xx（ 4） 18156 [11] 趙玉生 ,劉建斌 . 智能微弱光數(shù)字檢測(cè)儀電路設(shè)計(jì) 20xx(06):015702 [12] 孫涵芳 ,徐愛(ài)卿 .MCS51/96 系列單片機(jī)原理及應(yīng)用 北京航空航天大學(xué)出版社， 20xx [13] 譚浩強(qiáng) .C 語(yǔ)言程序設(shè)計(jì) .清華大學(xué)出版社， [14] 鄭先鋒 .家庭安防系統(tǒng)設(shè)計(jì) .信息技術(shù) , [20] [15] 康華光 ,陳大欽 ,張林 .電子技術(shù)基礎(chǔ)（模擬部分）高等教育出版社 20xx 安徽建筑大學(xué) 畢業(yè)設(shè)計(jì)（論文） 33 [16] 汪方斌等 .路面狀況自動(dòng)識(shí)別系統(tǒng) .儀表技術(shù)， [17] 汪方斌 . 基于 DSP 的前向能見(jiàn)度儀 .儀表技術(shù) , [18] 汪方斌 . 基于 SVM 和集群思想的多類分類算法 .工業(yè)儀表與自動(dòng)化裝置 , [19] 杜洋 .愛(ài)上單片機(jī) .人民郵電出版社 . [20] 周靈 彬 .基于 Protues 的電路與 PCB 設(shè)計(jì) .電子工業(yè)出版社 . [21] 戴上舉 .單片機(jī)入門到精通 .北京航空航天出版社 . [22] 夏路易 .protel 99se 設(shè)計(jì)教程 .北京希望電子出版社 . [23] 蘭吉昌 .51 單片機(jī)應(yīng)用設(shè)計(jì)百例 .化學(xué)工業(yè)出版社 . [24] 胡斌 .元器件及實(shí)用電路 .電子工業(yè)出版社 . [25] 牛余朋 .基于單片機(jī)的高精度超聲波測(cè)距電路 .電子世界， 安徽建筑大學(xué) 畢業(yè)設(shè)計(jì)（論文） 34 附錄一 火災(zāi)自動(dòng)報(bào)警原理圖 安徽建筑大學(xué) 畢業(yè)設(shè)計(jì)（論文） 35 附錄二 文獻(xiàn)翻譯 Structure and function of the MCS51 series Structure and function of the MCS51 series onechip puter MCS51 is a name of a piece of onechip puter series which Intel Company produces. This pany introduced 8 topgrade onechip puters of MCS51 series in 1980 after introducing 8 onechip puters of MCS48 series in 1976. It belong to a lot of kinds this line of onechip puter the chips have,such as 8051, 8031, 8751, 80C51BH, 80C31BH,etc., their basic position, basic performance and instruction system are all the same. 8051 daily representatives 51 serial onechip puters . An onechip puter system is made up of several following parts: ( 1) One microprocessor of 8 (CPU). ( 2) At slice data memory RAM (128B/256B),it use not depositting not can reading /data that write, such as result not middle of operation, final result and data wanted to show, etc. ( 3) Procedure memory ROM/EPROM (4KB/8KB ), is used to preserve the procedure , some initial data and form in slice. But does not take ROM/EPROM within some onechip puters, such as 8031 , 8032, 80C ,etc.. ( 4) Four 8 run side by side I/O interface P0 four P3, each mouth can use as introduction , may use as exporting too. ( 5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the external incident, can set up into a timing way too, and can 安徽建筑大學(xué) 畢業(yè)設(shè)計(jì)（論文） 36 according to count or result of timing realize the control of the puter. ( 6) Five cut off cutting off the control system of the source . ( 7) One all duplexing serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is it realize onechip puter or onechip puter and serial munication of puter to use for. ( 8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity need outer. Allow oscillation frequency as 12 megahertas now at most. Every the abovementioned part was joined through the inside data bus .Among them, CPU is a core of the onechip puter, it is the control of the puter and mand centre, made up of such parts as arithmetic unit and controller , etc.. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of logic operation while including one, the 1 storing device temporarilies of 8, storing device 2 temporarily, 839。s accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, e from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is 安徽建筑大學(xué) 畢業(yè)設(shè)計(jì)（論文） 37 depositted, the order decipher, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 onechip puters, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of . This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other puters, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is manded. There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of puter. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 byteses that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange 安徽建筑大學(xué) 畢業(yè)設(shè)計(jì)（論文） 38 the location. It is not very the same that the memory of MCS51 series onechip puter and general puter disposes the way in addition. General puter for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing di