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e used in conjunction with other registers to represent 16 or 32 bit values. As example one could look at the ADC struct declaration shown in Code Listing 34. 將一些寄存器與其他寄存器一起用來(lái)代表16位或32位的值。我們可以舉一個(gè)例子,看看 ADC 結(jié)構(gòu)申報(bào)的一個(gè)寄存器,見(jiàn)代碼列表34:Code Listing 34. ADC struct declaration. 代碼列表34. ADC 結(jié)構(gòu)申報(bào)In Code Listing 34, the ADC channel result registers CH0RES, CH1RES, CH2RES, CH3RES and the pare register, CMP, are 16bit values. These are declared using the WORDREGISTER macro shown in Code Listing 35. The calibration register, CAL, is a 32bit value, declared using the DWORDREGISTER shown in Code Listing 36. 在代碼列表34中, ADC通道的結(jié)果寄存器CH0RES , CH1RES , CH2RES , CH3RES和比較寄存器CMP都是16位值。這些寄存器都是用在代碼列表 35 中所示的 WORDREGISTER 宏申報(bào)的。校準(zhǔn)寄存器 CAL,是一個(gè)32位值的,它是用在代碼列表36中所示的 DWORDREGISTER 宏來(lái)申報(bào)的。Code Listing 35. WORDREGISTER Macro. 代碼列表 35. WORDREGISTER 宏Code Listing 36. DWORDREGISTER Macro. 代碼列表36. DWORDREGISTER 宏As seen, the WORDREGISTER macro uses “H” and “L” suffix for the high and low bytes respectively. The DWORDREGISTER uses number suffix to indicate the byte order. Both the 16bit and 32bit registers can be accessed in 16bit/32bit mode, by using the register name without suffix as shown in Code Listing 37. 如我們所看到的, WORDREGISTER宏使用后綴“H”和“L” 分別作為高8位元組和低8位元組, DWORDREGISTER使用數(shù)字后綴來(lái)表示8位元組的順序。在16/32位模式中, 都可以使用不帶后綴的寄存器名訪問(wèn)16位和32位寄存器,見(jiàn)代碼列表37。Code Listing 37. Accessing registers of varying size. 代碼清單37 。訪問(wèn)不同大小的寄存器。Code Listing 37 shows how the single byte register CTRLA is read, how the two CH0RES[H:L] registers are read using a 16bit operation, and how the four CAL[3:0] registers are read in a 32bit operation. C pilers handle multibyte registers automatically. Note however that in some cases it may be required to read and write multibyte registers in one atomic operation to avoid corruption. In this case, interrupts must be disabled during the multibyte access to make sure that an interrupt service routine does not interfere with the multibyte access. AVR1306 includes examples on how atomic access of registers is done for the XMEGA Timer/Counter modules. 代碼列表37演示了如何讀取單個(gè)8位元組寄存器CTRLA,如何使用一個(gè)16位的操作來(lái)讀取兩個(gè) CH0RES [ H:L] 寄存器,以及如何在32位的操作中讀取四個(gè) CAL [3:0] 寄存器。 C 語(yǔ)言編譯器會(huì)自動(dòng)處理多個(gè)8位元組的寄存器。但是請(qǐng)注意,在某些情況下可能要求在一個(gè)原子操作中讀寫多個(gè)8位元組的寄存器,以避免訛誤。假如這樣的話,在多個(gè)8位元組的訪問(wèn)期間必須禁止中斷,以確保一個(gè)中斷服務(wù)例程不妨礙多個(gè)8位元組的訪問(wèn)。 AVR1306中有些例子是關(guān)于寄存器是如何對(duì)XMEGA的計(jì)時(shí)器/計(jì)數(shù)器模塊進(jìn)行原子訪問(wèn)的。 Module Addresses 模塊訪問(wèn)Definitions of all peripheral modules are found in the device header files available for the XMEGA. The address for the modules is specified in ANSI C to make it patible with most available C pilers. Code Listing 38 shows how ADC 0 on port A is defined. 在適用于XMEGA設(shè)備的頭文件中找到所有外設(shè)模塊的定義。這些模塊的地址在ANSI C 語(yǔ)言標(biāo)準(zhǔn)中作了明確的規(guī)定,使其與大多數(shù)可用的 C 語(yǔ)言編譯器兼容。代碼列表 38 顯示了端口 A 上的 ADC 0 是如何定義的。Code Listing 38. Peripheral module definition. 代碼列表 38. 外設(shè)模塊的定義Code Listing 38 shows how the module instance definition uses a dereferenced pointer to the absolute address in the memory, coinciding with the module instance base address. The module pointers are predefined in the XMEGA header files, it is therefore not necessary to add these definitions in the source code 代碼列表38顯示模塊實(shí)例定義如何使用一個(gè)被解除引用的指針指向內(nèi)存中的絕對(duì)地址,正好與模塊實(shí)例的基礎(chǔ)地址重合。模塊指針是在 XMEGA 的頭文件中預(yù)先定義的,因此沒(méi)有必要在源代碼中添加這些定義。 Bit Masks and Bit Group Masks 位掩碼和位組掩碼Register bits can be manipulated using predefined masks, or alternatively bit positions. Bit positions are not remended for most tasks. The predefined bit masks are either related to individual bits, called a bit mask or a bit group, called a bit group mask, or group mask for short. 寄存器的位可以使用預(yù)先定義的掩碼,或另一個(gè)位的位置,進(jìn)行操作,但大多數(shù)任務(wù)中并不推薦使用位位置。預(yù)先定義的位掩碼可以與獨(dú)立的位有關(guān),稱之為位掩碼;或與一個(gè)位組有關(guān),稱之為位組掩碼,或簡(jiǎn)稱組掩碼。A bit mask is used both when setting and clearing individual bits. A bit group mask is mainly used when clearing multiple bits in a bit group. Setting multiple bit that are part of a bit group is covered in section . 一個(gè)位掩碼是在設(shè)置和清除獨(dú)立的位時(shí)使用,一個(gè)位組掩碼主要是用在清除一個(gè)位組中的復(fù)合位時(shí)使用。,介紹了復(fù)合位(作為一個(gè)位組的一部分)的設(shè)置。 Bit Mask 位掩碼Consider a Timer Counter Control Register D, CTRLD. The bit groups, bit names, bit positions and bit masks of this register can be seen in Table 31. 細(xì)心觀察一個(gè)計(jì)時(shí)器計(jì)數(shù)器控制寄存器D,CTRLD,在表31中我們可以看到該寄存器的位組、位名稱、位位置以及位掩碼。Table 31. Bit groups, bit names, bit positions and bit masks for bits in Timer Counter Control register D – CTRLD. 表31. 計(jì)時(shí)器計(jì)數(shù)器控制寄存器DCTRLD里的位的位組、位名稱、位位置以及位掩碼Since the names of bits need to be unique for the piler to handle them, all bits are prefixed with the module type it belongs to. In many cases, the module type name is abbreviated. For all bit defines related to the Timer/Counter modules, the bit names are prefixed by “TC_”. 由于位的名稱相對(duì)于處理它們的編譯器而言必須是唯一的,所有的位都是用其所屬的模塊類型作前綴。在許多情況下,模塊類型名稱是縮寫的。對(duì)于所有與計(jì)時(shí)器/計(jì)數(shù)器模塊有關(guān)的位的定義,其位名稱的前綴是“ TC_ ”To differentiate between bit masks and bit positions, a suffix is also appended. For a bit mask, the suffix is “_bm”. The name of the bit mask for the EVDLY bit is thus TC_EVDLY_bm. Code Listing 39 shows the typical usage of a bit mask. The EVDLY bit in the CTRLD register of Timer/Counter D0 is set, leaving all the other bits in the register unchanged. 要區(qū)分位掩碼和位的位置,還得附加一個(gè)后綴。對(duì)于一個(gè)位掩碼,其后綴是“ _bm ” 。因此 EVDLY位的位掩碼的名稱是 TC_EVDLY_bm 。代碼列表 39 顯示了一個(gè)位掩碼的典型用法。 將EVDLY位在計(jì)時(shí)器/計(jì)數(shù)器 D0的 CTRLD 寄存器中作了設(shè)置,讓該寄存器內(nèi)的所有其它的位保持不變。Code Listing 39. Bit mask usage.代碼列表 39. 位掩碼的用法 Bit Group Masks . 位組掩碼Many functions are controlled by a group of bits. Timer Counter CTRLD register the EVACT[2:0] and the EVSEL[3:0] bits are grouped bits. The value of the bits in a group selects a specific configuration. 許多功能是受一組位來(lái)控制的,計(jì)時(shí)器計(jì)數(shù)器CTRLD寄存器里的EVACT [2:0]位和EVSEL [3:0]位是被分組的位,一組內(nèi)的位值選擇一個(gè)特定的配置。When changing bits in a bit group it is often required to clear the bit group before assigning a new value. To put it in another way: It is not enough to set the bits that should be set, it is also required to clear the bits that should be cleared. To make this easy a bit group mask is