hashinaflashhashtablesforsolidstatedevices(編輯修改稿)
2024-11-04 21:04 本頁(yè)面
【文章內(nèi)容簡(jiǎn)介】 ash table excess 11/30/2020 10 Can we improve MB? ? Reduces number of write operations to flash device ? Batch Updates only when memory buffer is full ? Updates are semirandom ? (Key,Value) changes are maintained in memory ? Query times are reasonable ? Memory buffer search is fast ? Relatively fast SSD random access and linear probing (See Paper) ? Prefetch pages ? MB has disadvantages ? Sequential Page Level operations are preferred ?Fewer block updates ? Limited by the amount of available memory ?Think large disk datasets. ?Updates may be numerous 11/30/2020 11 Introduce an On Disk Buffer ? Batch updates from memory to disk are page level ? Reduce expensive block level writes (time and cleans) ? Increase Sequential writes ? Increase buffering capability ? Reduce expensive non semirandom Block Updates ? May decrease cleans ? Search space increases during queries ? Incurred only if inserting and reading concurrently ? However, less erasure time will decrease latency 11/30/2020 12 On Disk Buffering ? Change Segment (CS) ? Sequential Log Structure ? sequential writes ? stage() operation ? Flushes memory to CS ? Fast Page Level Operations ? merge() operation ? Invoked when CS is full ? Combines CS with Data Segment ? Less frequent than stage() ? What is the structure of the CS? 11/30/2020 13 Change Segment Structure v1 14 Buckets are assigned specific Change Segment Buckets. Change Segment Buckets are shared by multiple RAM buffer buckets. Memory Disk Bounded Buffer (MDB) ? Associate a CS block to k data blocks ? Semi random writes ? Only merge() full CS blocks ? Frequently updated blocks may incur numerous (k1) merge() operations ? Query times incur an additional block read ? Packed with unwanted data 11/30/2020 15 Change Segment Structure v2
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