【文章內(nèi)容簡介】 has express a binary operator (or borrow bits). If the operation results at the highest level there is binary (addition) or borrow (subtraction), the bit is 1, otherwise to 0. Secondly, auxiliary binary symbol AC. Also known as semibinary logo, it reflects both the number eight puting whether there is a half low of four binary, that is, the sum of the four low (or minus) has not binary (or borrow), and if there is AC for one status, otherwise to 0. Third, the overflow flag OV. MCS1 to reflect the number of operator symbols with the results of whether there is any spill, there is spill, this bit is 1, otherwise to 0. Fourth, the parity symbol P. Reflect the content of accumulator ACC parity, if the ACC in an operation that results in evennumbered months have one (such as 11001100B, one of four there is one), then P is 0, otherwise, P = 1. PSW other places, will introduce at a later time. PSW stored procedures because of the status, it is also called the program status character have a calculator in bitwise (bit) to carry out logic operations logic processor (also known as Boolean processor). Its function in the introduction explainbit instruction. About the controller, CPU controller is the nerve center, which includes the timing control logic circuit, an instruction register, decoder, address pointer DPTR and the program counter PC, stack pointer SP and so on. This program counter PC is 16bit register consisting of counters. To singlechip implementation of a program, it is necessary to put the program into memory in advance in order ROM of an area. Single chip action should be taken out of a sequence of mands to be implemented. Therefore, we must have a circuit to find out where the mand module address, the circuit is the program counter PC. When beginning the implementation of singlechip program, to the PC load instructions where the first address, it took out one of each mand (such as for multibyte instructions, each took out a mand byte), PC will automatically add the contents of one to point to the next instruction address, so that instruction can be the order of implementation. Only when the process encountered in the transfer of instructions, subroutine call instructions, or encountered failure (after the introduction), PC only needed to go to go places. 8051 CPU39。s designated address, the corresponding unit from the ROM mand byte out on the instruction register in the storage, then, an instruction register of the instruction decoder code was translated into various forms of control signals, these singlechip signal and clock oscillator generated clock pulse in timing and control circuit bination of a certain period of time according to changes in electric calm beat the clock, the socalled control of information in the CPU internal coordination between the register data transfer, puting and other operations. Then tell us about memory, memory MCU are also an important ponent of has a storage capacity of 256 units of memory structure. One of each memory cell corresponds to an address, a total of 256 unit 256 addresses, use two 16 hexadecimal numbers, that is, memory address (00H ~ FFH). Memory of each memory cell can store one of eight binary information, usually using two 16band number to express, and this is the contents of memory. Memory storage unit address and the contents of memory cells are two different concepts, should not confuse. Singlechip also includes the program memory. Process control puters are a series of action mands, Microcontroller Know only by 0 and 1 consisting of machine code instructions. Such as the preparation of the foregoing order with Mnemonic MOV A, 20H, Know the code into the machine 74H, 20H: (written in binary is 01110100B and 00100000B). Problem in SCM is required before the deal will be good procedures, tables, constants piled into machine code into singlechip memory, the memory referred to as program memory. Program memory can be put on the chip or chip, chipchip can also be set up simultaneously. As the PC program counter to 16, making the procedure available for 16bit binary memory addresses, therefore, both inside and outside the memory address from 0000H to the largest FFFFH. 8051 has 4k bytes of internal ROM, on the occupied by the 0000H ~ 0FFFH minimum 4k bytes, when the expansion of chip program memory address number shall be 1000h start, if you use 8051 as a 8031, do not want to use chip 4kROM , all used memory chip, then the address code can still start from , when EA feet should be used to maintain the low level. When EA is high, the user 0FFFH at 0000H to use internal ROM, more than 0FFFH, the singlechip CPU automatic access to external program memory. Singlechip data memory RAM memory by reading and writing ponents. Its maximum capacity can be expanded to 64k, used to store realtime input data. 8051 has 256 units within the internal data memory, one of 00H ~ 7FH for internal random access memory RAM, 80H ~ FFH area dedicated registers. Actual use should be the first full use of internal memory, from the use of perspective, to understand the structure of internal data memory and address of the distribution is very important. Since studying at the future directions of design systems and procedures will be frequently used them. 8051 internal data memory address 00H to FFH by a total of 256 bytes of address space, the space was divided into two parts, one of the internal data RAM address 00H ~ 7FH (that is, 0 ~ 127). The Special Function Registers to do with the address 80H ~ FFH. In this 256byte also has opened up a socalled digital address area, the region can not only byte addressable, but also by the bit (bit) addressable. For those required to carry out the operation of the data bit can be stored into the region. From 00H to 1Fh arranged group of four working registers, each o