windowcedevelopmentenvironmen(編輯修改稿)
2025-06-24 08:23 本頁(yè)面
【文章內(nèi)容簡(jiǎn)介】 de. ? Implementing the image download code. ? Implementing the PPSH port I/O port code. – OEMParallelPortGetByte – OEMParallelPortGetStatus – OEMParallelPortSendByte ITE Property amp。 Confidential 15 Integrated Technology Express,Inc. 2020/6/21 ? Implementing the Debug Serial Port I/O Code – OEMInitDebugSerial – OEMReadDebugByte – OEMWriteDebugByte ITE Property amp。 Confidential 16 Integrated Technology Express,Inc. 2020/6/21 ? Implementing the Flash Write Code – OEMFlashWrite ? Writes bytes to flash memory – OEMFlashWriteBegin ? Prepares flash memory for write access. – OEMFlashWriteEnd ? Does any postwrite clean up in memory. – OEMFlashWriteStatus ? Returns the status of a write to flash memory. ITE Property amp。 Confidential 17 Integrated Technology Express,Inc. 2020/6/21 Windows CE applications (Including shell) ISV Device manager IrDA Unimodem File system AFD TAPI TCP PPP CoreDLL PC card clients IHV OAL OEM hardware KBD PC Card SER AUD DSP OEM deliverables OEM Microsoft (binary) Kernel Library GWES BAT TCH OS Architecture ITE Property amp。 Confidential 18 Integrated Technology Express,Inc. 2020/6/21 To Port the OAL ? The OAL (OEM Abstraction Layer) – The OAL is implemented by the OEM ? Isolates all platform specific parts of the kernel into a small piece of code. ? Links with the kernel library to create kernel executable. – The kernel library is CPU specific but platform independent (for example, it contains MMU code but does not include the ISR code for the devices). ITE Property amp。 Confidential 19 Integrated Technology Express,Inc. 2020/6/21 ? The OAL includes a set of drivers for the following: – Initializing the platform. – Servicing device interrupts. – System Timer. – Power management. ? OEMPowerOff – Set platform to power off state ? OEMPowerIdle – Set platform to standby mode ITE Property amp。 Confidential 20 Integrated Technology Express,Inc. 2020/6/21 ? Implement ISRs for Your platform – An ISR has limited time and resources to handle the interrupt and return the interrupt ID value to the kernel. – Each ISR is limited to a subset of the available CPU registers. The subset allowed is specific to each CPU type. – The ISR can not cause a nested exception. ITE Property amp。 Confidential 21 Integrated Technology Express,Inc. 2020/6/21 ? Implement ISR management functions – OEMInterruptDi
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