【正文】 多的非電氣專業(yè)人士也對(duì) PLC 很快認(rèn)識(shí)并深入。 PLC 系統(tǒng)是為工廠設(shè)計(jì)的，因此它沒(méi)有鼠標(biāo)鍵盤之類的輸入設(shè)備。當(dāng) PLC 被啟動(dòng)時(shí)，在 EPROM 上的梯形邏輯程序被下載 PLC 并且運(yùn)行。根據(jù)例子中的邏輯關(guān)系，第一次掃描將封上‘ light’，直到‘ clear’被啟動(dòng)。并且梯形圖的第一行將無(wú)效。這樣做的主要原因是如果一個(gè)程序在多個(gè)地方用一個(gè)輸入值，那么輸入值的變化將使其邏輯關(guān)系無(wú)效。當(dāng)梯形圖掃描完成后，輸出將用存儲(chǔ)器中臨時(shí)值修正，這叫做輸出掃描。存儲(chǔ)器和磁盤用語(yǔ)存儲(chǔ)要輸出的 數(shù)據(jù)。它典型地在 PC 機(jī)上運(yùn)行調(diào)試。 可編程邏輯控制器用各種軟件編程語(yǔ)言來(lái)控制?？删幊踢壿嬁刂破鳎?PLC ） 1 可編程邏輯控制器（ PLC ） 1． PLC 介紹 眾所周知，科技世界里只有一個(gè)永恒真理，那就是變化。這些語(yǔ)言包括 IEC611313，順序執(zhí)行表（ SFC），動(dòng)作方塊圖（ FBD），梯形圖（ LD），結(jié)構(gòu)文本（ ST），指令序列（ IL），繼電器梯形圖（ RIL），流程圖， C 語(yǔ)言和 Basic 語(yǔ)言。 BASIC 語(yǔ)言是用于處理數(shù)據(jù)的連續(xù)的數(shù)字采集和接口運(yùn)行的高級(jí)語(yǔ)言。如果我們把個(gè)人計(jì)算機(jī)看作一個(gè)控制器，它通過(guò)在屏幕上輸出激勵(lì)和輸入來(lái)自鼠標(biāo)和鍵盤的響應(yīng)來(lái)控制用戶。 PLC 此時(shí)將從自我檢測(cè)開(kāi)始重新啟動(dòng)這個(gè)過(guò)程，這個(gè)過(guò)程很明顯地每秒鐘重復(fù) 10 到 100 次，正如圖 3 所示 自我檢測(cè) — 檢測(cè)是否所有的卡沒(méi)有錯(cuò)誤，把時(shí)間繼電器復(fù)零等。而且，如果隨著每塊的變化，輸出模塊也變化，在掃描 結(jié)束時(shí) PLC 的運(yùn)行速度將大大減慢。 可編程邏輯控制器（ PLC ） 6 6． PLC 狀態(tài)顯示 在一個(gè) PLC 中，缺少鍵盤和其 它 的輸入輸出設(shè)備是非常值得注意的。因此燈將在PLC 被啟動(dòng)之后變亮，但在‘ clear’被啟動(dòng)之后，它將關(guān)閉并且保持在關(guān)閉狀態(tài)。這種方法非?？煽?，但是擦除和編程技術(shù)都是很消耗時(shí)間的。 (雖然，一些較新型 PLC 能夠 達(dá)到 )它 們也沒(méi)有屏幕聲音之類的輸出設(shè)備， .取而代之， 它 們有電壓 ,電流這樣的輸入設(shè)備和輸出設(shè)備。 以 上僅僅是 PLC 的優(yōu)點(diǎn)之一，這也是人們比較容易理解的一部分，在很多的設(shè)備中，人們已不再希望看到太多的控制按鈕，它們不但容易損壞而且極易產(chǎn)生人為的失誤，小的并不是主要的失誤也許你還能夠接受；但過(guò)大的甚至是致命的失誤是我們無(wú)法容忍的。 信息輸送的過(guò)程也有同步和異步之分：同步的意義在于發(fā)送數(shù)據(jù)時(shí)數(shù)據(jù)線和時(shí)鐘線是同步的，也就是數(shù)據(jù)信號(hào)和時(shí)鐘信號(hào)同時(shí)由 CPU 進(jìn)行發(fā)送，這需要彼此都要專門的時(shí)鐘信號(hào)來(lái)進(jìn)行傳送和接送，并且是強(qiáng)制性的，這種方法的特點(diǎn)在于它的速度極快、但相應(yīng)占用 CPU 的工作時(shí)間也相對(duì)的要長(zhǎng)、同時(shí)技術(shù)難度也非常的大。這樣講也許你并不能完全理解中斷的內(nèi)部結(jié)構(gòu)和操作順序，我們做一個(gè)小小的例子來(lái)說(shuō)明 . 每一個(gè)設(shè)備總是不會(huì)忘記有一個(gè)按鈕，它也是在我們遇到緊急情況時(shí)使用的，那就是急停按鈕。 Inputs the keyboard is analogous to a proximity switch. Input circuits the serial input chip is like a 24Vdc input card. Computer the 686 CPU is like a PLC CPU unit. Output circuits a graphics card is like a triac output card. Outputs a monitor is like a light. Storage memory in PLC is similar to memories in personal puters. It is also possible to implement a PLC using a normal Personal Computer, although this is not advisable. In the case of a PLC the inputs and outputs are designed to be more reliable and rugged for harsh production environments. 3. OPERATION SEQUENCE All PLC have four basic stages of operations that are repeated many times per second. Initially when turned on the first time it will check its own hardware and software for faults. If there are no problems it will copy all the input and copy their values into memory, this is called the input scan. Using only the memory copy of the inputs the ladder logic program will be solved once, this is called the logic scan. While solving the ladder logic the output values are only changed in temporary memory. When the ladder scan is done the outputs will be updated using the temporary values in memory, this is called the output scan. The PLC now restarts the process by starting a self check for faults. This process typically repeats 10 to 100 times per second as is shown in Figure 3. Figure 3 PLC Scan Cycle SELF TEST Checks to see if all cards error free, reset watchdog timer, etc. (A watchdog timer will 可編程邏輯控制器（ PLC ） 18 cause an error, and shut down the PLC if not reset within a short period of time this would indicate that the ladder logic is not being scanned normally). INPUT SCAN Reads input values from the chips in the input cards, and copies their values to memory. This makes the PLC operation faster, and avoids cases where an input changes from the start to the end of the program (., an emergency stop). There are special PLC functions that read the inputs directly, and avoid the input tables. LOGIC SOLVE/SCAN Based on the input table in memory, the program is executed 1 step at a time, and outputs are updated. This is the focus of the later sections. OUTPUT SCAN The output table is copied from memory to the output chips. These chips then drive the output devices. The input and output scans often confuse the beginner, but they are important. The input scan takes a snapshot of the inputs, and solves the logic. This prevents potential problems that might occur if an input that is used in multiple places in the ladder logic program changed while half way through a ladder scans. This problem could have severe effects on plex programs that are developed later in the book. One side effect of the input scan is that if a change in input is too short in duration, it might fall between input scans and be missed. When the PLC is initially turned on the normal outputs will be turned off. This does not affect the values of the inputs. 4． The Input and Output Scans When the inputs to the PLC are scanned the physical input values are copied into memory. When the outputs to a PLC are scanned they are copied from memory to the physical outputs. When the ladder logic is scanned it uses the values in memory, not the actual input or output values. The primary reason for doing this is so that if a program uses an input value in multiple places, a change in the input value will not invalidate the logic. Also, if output bits were changed as each bit was changed, instead of all at once at the end of the scan the PLC would operate much slower. 5． The Logic Scan Ladder logic programs are modelled after relay logic. In relay logic each element in the ladder will 可編程邏輯控制器（ PLC ） 19 switch as quickly as possible. But in a program elements can only be examines one at a time in a fixed sequence. Consider the ladder logic in Figure 4, the ladder logic will be interpreted lefttoright, toptobottom. In the figure the ladder logic scan begins at the top rung. At the end of the rung it interprets the top output first, then the output branched below it. On the second rung it solves branches, before moving along the ladder logic rung. Figure 4 Ladder Logic Execution Sequence It also bees important when considering output usage. Consider Figure 5, the first line of ladder logic will examine input A and set output X to have the same value. The second line will examine input B and set the output X to have the opposite value. So the value