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畢業(yè)設(shè)計(jì)-基于at89c51單片機(jī)的多用戶門鈴設(shè)計(jì)(專業(yè)版)

  

【正文】 這種內(nèi)存結(jié)構(gòu)是所謂的普林斯頓結(jié)構(gòu)。 ACC 累加 器是 ALU運(yùn)算結(jié)果的存放單元,一般數(shù)據(jù)通過它來傳送。s trigger, restore to 30 the throne circuit sample to output , Schmitt of trigger constantly in each S5P2 , machine of cycle in having one more , then just got and restored to the throne and operated the necessary signal insidly. Restore to the throne resistance of circuit generally, electric capacity parameter suitable for 6 brilliant to shake, can is it restore to the throne signal high level duration greater than 2 machine cycles to guarantee. Being restored to the throne in the circuit is simple, its function is very important. Pieces of onechip puter system could normal running,should first check it can restore to the throne not succeeding. Checking and can pop one39。當(dāng)按下開關(guān) k1時(shí) , LS1就會(huì)相應(yīng)的響起。 17 PROTEUS 仿真軟件 Proteus軟件 是英國(guó) Labcenter electronics公司出版的 EDA工具 (仿真軟件 )。 Keil C51生成的目標(biāo)代碼效率非常之高,多數(shù)語(yǔ)句生成的匯編代碼很緊湊,容易理解 [6]。經(jīng)實(shí)測(cè)元件知其電阻為 10歐姆。根據(jù)實(shí)際情況,對(duì)外接 電容 C1, C2 雖然沒有十分嚴(yán)格的要求,但電容容量的大小會(huì)輕微影響振蕩頻率的高低,振蕩器工作的穩(wěn)定性,起振的難易程度及溫度穩(wěn)定性。如果微處理器在外部執(zhí)行狀態(tài) ALE 禁止 ,置位無(wú)效。在給出地址 1 時(shí) ,它利用內(nèi)部上拉優(yōu)勢(shì) ,當(dāng)對(duì)外部八位地址數(shù)據(jù)存儲(chǔ)器進(jìn)行讀寫時(shí) ,P2 口輸出其特殊功能寄存器的內(nèi)容?,F(xiàn)將各硬件及電路介紹如下: AT89C51 芯片 AT89C51 芯片引腳排列 AT89C51 是標(biāo)準(zhǔn)的 40 引腳雙列直插式集成電路芯片,引腳分布可參照單片機(jī)引腳。在片外:尋址范圍只有 4KB;芯片引腳有 40 個(gè)。隨著人們生活水平的提高,小區(qū)的安全受到越來越多人的重視,得到一種簡(jiǎn)便實(shí)用的門鈴控制,不但可以保障小區(qū)的安全,而且能夠提高人們的效率。s life, greatly improves the village of security, satisfy people39。該多 用戶門鈴方便了人們的生活,提高了小區(qū)的安全性。 圖 方案二 本設(shè)計(jì)選用第二種方案,即可實(shí)現(xiàn) 多用戶門鈴的控制 ,技術(shù)含量、成本、設(shè)計(jì)周期也低, 并且根據(jù)中央芯片檢測(cè)門鈴按鈕是否按下。并因此作為輸入時(shí) ,P2 口的管腳被外部拉低 ,將輸出電流。如想禁止 ALE 的輸出可在 SFR8EH 地址上置 0。晶振有一個(gè)重要的參數(shù),那就是負(fù)載電容值,選擇與負(fù)載電容值相等的并聯(lián)電容,就可以得到晶振標(biāo)稱的諧振頻率 [5]。 圖 復(fù)位電路原理圖 10 負(fù)載電路 負(fù)載電路主要是由一個(gè) PNP型三極管和一個(gè) 2k歐電阻外加一個(gè)蜂鳴器組成的。 13 6 仿真與調(diào)試 KeilC51 編譯軟件 Keil C51是美國(guó) Keil Software公司出品的 51系列兼容單片機(jī) C語(yǔ)言軟件開發(fā)系統(tǒng),與匯編相比, C語(yǔ)言 在功能上、結(jié)構(gòu)性、可讀性、可維護(hù)性上有明顯的優(yōu)勢(shì),因而易學(xué)易用。 (2)Program Size: data= xdata=0 code=552: 程序大小:內(nèi)部數(shù)據(jù) = ,外部數(shù)據(jù) =0字節(jié),代碼 =552字節(jié)。在 Proteus的菜單欄中,打開 Debug下拉菜單,在菜單中選中 Use start/restart debugging選項(xiàng)。s accumulation device ACC, register B and procedure state register PSW, etc. Person who accumulate ACC count by 2 input ends entered of checking etc. temporarily as one operation often, e from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as 28 the transfer station of data transmission on 8051 inside . The same as general microprocessor, it is the busiest register. Help remembering that agreeing with A expresses in the order. The controller includes the procedure counter , the order is depositted, the order decipher, the oscillator and timing circuit, etc. The procedure counter is made up of counter of 8 for two, amounts to 16. It is a byte address counter of the procedure in fact, the content is the next IA that will carried out in PC. The content which changes it can change the direction that the procedure carries out . Shake the circuit in 8051 onechip puters, only need outer quartz crystal and frequency to finely tune the electric capacity, its frequency range is its 12MHZ of . This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other puters, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is manded. There are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with general memory of puter. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, address begin from 0000H, used for preserving the procedure and form constant. Data 8051 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data are stored temporarily and the data are buffered etc.. In RAM of this 128B, there is unit of 32 byteses that can be appointed as the job register, this and general microprocessor is different, 8051 slice RAM and job register rank one formation the same to arrange the location. It is not very the same that the memory of MCS51 series onechip puter and general puter disposes the way in addition. General puter for first address space, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributing different address space in a formation. While visiting the memory, corresponding and only an address Memory unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the angle from users, 8051 memory address space is divided into three kinds: (1) In the slice, arrange blocks of FFFFH , 0000H of location , in unison outside the slice (use 16 addresses). (2) The data memory address space outside one of 64KB, the address is arranged from 0000H 64KB FFFFH (with 16 addresses ) too to the location. (3) Data memory address space of 256B (use 8 addresses). Three abovementioned memory 29 space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses MOV to visit in slice. 8051 onechip puter have four 8 walk abreast I/O port, call P0, P1, P2 and P3. Each port is 8 accurate twoway mouths, accounts for 32 pin
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