【正文】 t 39。/********************************************************************* name: main* func: c code entry* para: none* ret: none* modify:* ment: ********************************************************************/void Main(void){ sys_init()。 所謂大端模式，是指數(shù)據(jù)的低位（就是權(quán)值較小的位）保存在內(nèi)存的高地址中，而數(shù)據(jù)的高位保存在內(nèi)存的低地址中。Bank6和Bank7的詳細(xì)地址與空間大小的關(guān)系可參考表2 圖 1 表2 功能及應(yīng)用概述S3C44B0X存儲(chǔ)控制器支持大小端選擇、Bank0總線寬度選擇和存儲(chǔ)器地址線連接。 《嵌入式系統(tǒng)》是計(jì)算機(jī)科學(xué)與技術(shù)專(zhuān)業(yè)必修課程，本次課程設(shè)計(jì)主要是檢驗(yàn)學(xué)生是否掌握相關(guān)專(zhuān)業(yè)知識(shí)，加強(qiáng)對(duì)ARM體系結(jié)構(gòu)的了解，充分調(diào)動(dòng)學(xué)生的積極性和創(chuàng)造性，并重視學(xué)生實(shí)際動(dòng)手能力的培養(yǎng)。因此，嵌入式技術(shù)的發(fā)展主要體現(xiàn)在芯片技術(shù)的發(fā)展，以及在芯片技術(shù)限制下得算法改進(jìn)和軟件的進(jìn)步上。圖1為S3C44B0X復(fù)位后的存儲(chǔ)器地址分配圖。因此，就導(dǎo)致了大端存儲(chǔ)模式和小端存儲(chǔ)模式。存儲(chǔ)器地址引腳S3C44BOX地址8位數(shù)據(jù)總線S3C44BOX地址16位數(shù)據(jù)總線S3C44BOX地址32位數(shù)據(jù)總線A0A0A1A2A1A1A2A3A2A2A3A4A3A3A4A5...……… 表114程序設(shè)計(jì)代碼/********************************************************************* File： * Author: embest* Desc： c main entry* History: ********************************************************************/include extern void s_ram_test(void)。 }************************************************************ NAME: * Author: Embest * Desc: C start up codes * Configure memory, Initialize ISR, stacks * Initialize Cvariables * Fill zeros into zeroinitialized Cvariables * History: ************************************************************* .include .include /**//* constant define /**/ Interrupt Control .equ INTPND, 0x01e00004 .equ INTMOD, 0x01e00008 .equ INTMSK, 0x01e0000c .equ I_ISPR, 0x01e00020 .equ I_CMST, 0x01e0001 Watchdog timer .equ WTCON, 0x01d30000 Clock Controller .equ PLLCON, 0x01d80000 .equ CLKCON, 0x01d80004 .equ LOCKTIME, 0x01d8000c Memory Controller .equ REFRESH, 0x01c80024 BDMA destination register .equ BDIDES0, 0x1f80008 .equ BDIDES1, 0x1f80028 Predefined constants .equ USERMODE, 0x10 .equ FIQMODE, 0x11 .equ IRQMODE, 0x12 .equ SVCMODE, 0x13 .equ ABORTMODE, 0x17 .equ UNDEFMODE, 0x1b .equ MODEMASK, 0x1f .equ NOINT, 0xc0 .equ IRQ_MODE, 0x40 /* Enable Interrupt Mode (IRQ) */ .equ FIQ_MODE, 0x80 /* Enable Fast Interrupt Mode (FIQ) *//**//* macro define *//**/.macro HANDLER HandleLabel stmdb sp!, {r0r11, ip, lr} /* push r0r11, ip, lr */ ldr r0, =\HandleLabel ldr r1, [r0] mov lr, pc bx r1 /* call interrupt routine */ ldmia sp!, {r0r11, ip, lr} /* pop r0r11, ip, lr */ subs pc, r14, 4 /* interrupt ret */.endm.equ DON, (16).equ DOFF, (06).macro LCD_DOFF OPT ldr r1, =0x01d2001c ldr r2, =0x9aaa str r2, [r1] ldr r2, =0x0 str r2, [r1, 8] GPUPD ldr r2, [r1, 4] bic r2,r2,DON change the GPD6 orr r2,r2,\OPT str r2, [r1, 4] GPDATD.endm.equ LED1, (18).equ LED2, (19).macro LED_ON NUM ldr r1, =0x01d20010 GPCONC ldr r2, =0x0FF5FF55 str r2, [r1] ldr r2, =0x30ff str r2, [r1, 8] GPUPC ldr r2, [r1, 4] bic r2,r2,\NUM str r2, [r1, 4] GPDATC.endm/**//* extern symbol *//**/ .extern Image_RO_Base /* start of rom code */ .extern Image_RO_Limit /* End of ROM code (=start of ROM data) */ .extern Image_RW_Base /* Base of RAM to initialise */ .extern Image_ZI_Base /* Base and limit of area */ .extern Image_ZI_Limit /* to zero initialise */ .extern Main /* The main entry of mon program *//**//* code *//**/ .textENTRY: b ResetHandler /* for debug */ b HandlerUndef /* handlerUndef */ b HandlerSWI /* SWI interrupt handler*/ b HandlerPabort /* handlerPAbort */ b HandlerDabort /* handlerDAbort */ b . /* handlerReserved */ ldr pc, =HandlerIRQ b HandlerFIQ ***IMPORTANT NOTE*** If the H/W vectored interrutp mode is enabled, The above two instructions should be changed like below, to workaround with H/W bug of S3C44B0X interrupt controller. b HandlerIRQ subs pc,lr, 4 b HandlerIRQ subs pc,lr, 4VECTOR_BRANCH: ldr pc, =HandlerEINT0 /*mGA H/W interrupt vector table */ ldr pc, =HandlerEINT1 /* */ ldr pc, =HandlerEINT2 /* */ ldr pc, =HandlerEINT3 /* */ ldr pc, =HandlerEINT4567 /* */ ldr pc, =HandlerTICK /*mGA */ b . b . ldr pc, =HandlerZDMA0 /*mGB */ ldr pc, =HandlerZDMA1 /*