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to the size and mass reduction, thereby pleting the number of cables required for each test is significantly reduced. Which in turn allows us to reduce the cable can acquire more real signals, greatly improving the accuracy of each measurement. With LabVIEW, NI TestStand and NI PXI modular instruments, Orbis Compact Tester quickly developed a prototype to demonstrate the Navy. Navy test new functionality provided by the system, the potential cost savings, as well as reducing signal noise RFI spares returned to the Treasury to reduce the time and other advantages cooing.Multithreaded programming challenge To date, the processor technology in the field of innovation has made your puter is working at higher clock speed of the central processing unit (CPU). However, as the clock rate approaching its theoretical physical limits with multiple (rather than individual) among the new processors are in the research and development of nuclear. Take advantage of these new multicore processor for automated test applications using parallel programming techniques, you can achieve the best performance and highest throughput. Dr Edward Leethe University of California, Berkeley, distinguished professor of electrical and puter engineering departmentdescribe parallel processing technology. Many technology experts predicted that response will be the end of Moore39。Orbis還致力于開(kāi)展前沿的研發(fā)項(xiàng)目,重點(diǎn)開(kāi)發(fā)創(chuàng)新型自動(dòng)化測(cè)試系統(tǒng)(ATS)。從NI PXI模塊化儀器中尋找解決方案通過(guò)使用獨(dú)立運(yùn)行的儀器和模塊化儀器對(duì)各種解決方案進(jìn)行比較,我們決定采用PXI模塊化儀器平臺(tái),因?yàn)槲覀冃枰粋€(gè)緊湊靈活的測(cè)試系統(tǒng)。啟動(dòng)程序后,LabVIEW會(huì)調(diào)用每個(gè)PXI模塊、進(jìn)行自檢操作、檢查校準(zhǔn)日期是否有效,然后再進(jìn)行功能測(cè)試。Compact Tester以12立方英尺的18槽PXI機(jī)箱測(cè)試系統(tǒng)替代了84立方英尺的測(cè)試系統(tǒng)。多線程編程的挑戰(zhàn) 迄今,處理器技術(shù)領(lǐng)域中的創(chuàng)新已經(jīng)使得計(jì)算機(jī)具備了工作于更高時(shí)鐘速率的中央處理器單元(CPU)?!毙疫\(yùn)的是,LabVIEW為多核處理器提供了一個(gè)理想的編程環(huán)境,因?yàn)樗鼮閯?chuàng)建并行算法提供了一個(gè)直觀的環(huán)境,而且它可以動(dòng)態(tài)指派多個(gè)線程至一項(xiàng)給定的應(yīng)用。而且,PXIe模塊化儀器增強(qiáng)了這一技術(shù)優(yōu)勢(shì),因?yàn)镻CIe總線使高數(shù)據(jù)傳輸速率成為可能。利用這些新型多核處理器,自動(dòng)化測(cè)試應(yīng)用利用并行編程技術(shù),便可以達(dá)到最佳性能和最高吞吐量。此外,使用工業(yè)標(biāo)準(zhǔn)的PXI硬件和LabVIEW軟件,我們還能夠減少日常的運(yùn)行和維護(hù)成本。測(cè)試執(zhí)行結(jié)束時(shí),便會(huì)根據(jù)所采集的測(cè)試數(shù)據(jù)生成一份易讀且可導(dǎo)出的XML格式報(bào)告。PXI平臺(tái)為我們的開(kāi)發(fā)提供了一個(gè)良好的開(kāi)端,因?yàn)镹I模塊保證所有設(shè)備能夠與LabVIEW通信,而無(wú)需創(chuàng)建自定義設(shè)備驅(qū)動(dòng)程序。這些系統(tǒng)的維修和故障排除涉及子組件模塊與RFI備件之間的互換?!盫ickie Hoffmann, Orbis Inc. LabVIEW圖形化信號(hào)處理平臺(tái)由千余個(gè)信號(hào)處理、分析與數(shù)學(xué)運(yùn)算函數(shù)組成的信號(hào)處理與數(shù)學(xué)函數(shù)庫(kù)組成,包含小波變換、時(shí)頻分析、圖像處理、濾波器設(shè)計(jì)、聲音與振動(dòng)、系統(tǒng)辨識(shí)、RF分析等專業(yè)方法的工具包,可與NI硬件的無(wú)縫結(jié)合,使算法得到快速驗(yàn)證與部署。解決方案 使用緊湊小巧的NI PXI模塊化儀器、LabVIEW軟件和NI TestStand來(lái)開(kāi)發(fā)與VME總線測(cè)試設(shè)備具有相同軍用測(cè)試功能的測(cè)試系統(tǒng),同時(shí)大幅減少尺寸,降低復(fù)雜性和成本,使海軍能夠?qū)y(cè)試系統(tǒng)部署在戰(zhàn)略位置,并降低整體維護(hù)成本和潛艇艦隊(duì)的物流成本。除了運(yùn)輸模塊的成本之外,另一個(gè)主要的成本來(lái)自于保持足夠的備件庫(kù)存以替換正在測(cè)試和運(yùn)輸過(guò)程中的組件。此外,我們還將VME接口集成到測(cè)試系統(tǒng),并將其連接至ITA,從而為每個(gè)UUT提供了全面的VME總線測(cè)試。 為了開(kāi)發(fā)當(dāng)前的穩(wěn)定系統(tǒng),我們使用NI LabVIEW 2010軟件、LabVIEW FPGA模塊以及LabVIEW RealTime模塊。而電纜的減少反過(guò)來(lái)可使我們能夠采集到更真實(shí)的信號(hào),大大提高每次測(cè)量的準(zhǔn)確性。”而且,利用多核處理器的編程應(yīng)用是一個(gè)巨大的編程挑戰(zhàn),這是廣為接受的。