【正文】 llotted. After identification, slot status is checked. Status can be filled, empty or reserved. RF sensors are used in this process.Figure 4:ASMD char for parking system ResultsAfter space checking door will open with the help of stepper motor. Here in simulation clk pulse and reset is applied as an input. Cnt and clkd are signals. When reset goes hightolow, stepper motor rotates. Simulation wave forms of stepper motor are shown in figure 4(a)Figure 4（a）:Simulation of stepper motor ratation Figure 4(b) :RTL view of stepper motor and LCD interfacingFigure 4(b):RTL view of stepper motor and LCD interfacingFigure above shows the RTL view of stepper motor and LCD interfacing.clk is system clock signal. rst is control signal. D(7:0) are data lines. Z(3:0) is output signal of stepper motor. E is enable signal of LCD. rs is register select signal. rw is read/write controlsignal.When door opened, identification process starts. w, w1, w2, z, clk and reset are inputs. Out_1 is output. Current_state and next_state describes visitor is identified or a new member has e. Pr_st and nx_st shows person which is identified. Following simulation shows identification process: Figure 4(c):Simulation of identification moduleAfter that slot checking procedure starts. Here w1, w2, w3, w, clk, reset are input signals. Led_slotallot and slotallot are output signals. When reset signal goes hightolow, system es out from idle state. According to input signals in following simulation slot 15 is available. Following simulation shows slot allotment feature.Figure 4(d):Simulation of slot allotment featureNow identification and slot allotment modules are integrated. clk, w3, car_enter,rest,w4,find,a,w2 are input ,new_member,fnd1,z, led,led_filled,led_reserv,cout are output signals. According to input signal, slot status is checked.Figure 4(e):Simulation results of plete parking systemFigure 5:RTL view of parking systemFigure above shows the 32 slot involving RTL view parking , W3, W4 are input signals. Reset is control is system clock signal. Led, led_filled, led_reserv are output signals,which shows slot and new_member are also output signals,which shows result of identification module.5. CONCLUSIONThe present FPGA based parking system is implemented using FSMs with the help of Xilinx ISE Design Suite design is verified on Virtex 5 FPGA machines increase productivity, reduces cost,and accelerates time to market. FPGA based parking system,gives fast designed system can be used for many applications and can easily enhance the number of slot selections. Parking bees easy by the use of Designed system.