開關(guān)電源設(shè)計(jì)外文翻譯-其他專業(yè)(完整版)
【正文】 ary turns will be selected using Eqs. to for Ton = , and the term Vdc – 1 will be replaced by theminimumprimary voltage, which is (Vdc/2)?1. The secondary RMS currents and wire sizes are calculated from Eqs. and , exactly as for the fullwave secondaries of a pushpull circuit. Output Filter Calculations The output inductor and capacitor are selected using Eqs. and as in a pushpull circuit for the same inductor current ramp amplitude and desired output ripple voltage. Blocking Capacitor to Avoid Flux Imbalance To avoid the fluximbalance problem discussed in connection with the pushpull circuit (Section ), a small capacitor Cb is fitted in series with the primary as in Figure . Recall that flux imbalance occurs if the voltsecond product across the primary while the core is set (moves in one direction along the hysteresis loop) differs from the voltsecond product after it moves in the opposite direction. Thus, if the junction of C1 and C2 is not at exactly half the supply voltage, the voltage across the primary when Q1 is “on” will differ from the voltage across it when Q2 is “on” and the core will walk up or down the hysteresis loop, eventually causing saturation and destroying the transistors. This saturating effect es about because there is an effective DC current bias in the primary. To avoid this DC bias, the blocking capacitor is placed in series in the primary. The capacitor value is selected FIGURE The small blocking capacitor Cb in series with the halfbridge primary (Figure ) is needed to prevent flux imbalance if the junction of the filter capacitors is not at exactly the midpoint of the supply voltage. Primary current charges the capacitor, causing a droop in the primary voltage waveform. This droop should be kept to no more than 10%. (The droop in primary voltage, due to the offset charging of the blocking capacitor, is shown as dV.) as follows. The capacitor charges up as the primary current Ipft flows into it, robbing voltage from the flattopped primary pulse shown in Figure . This DC offset robs voltseconds from all secondary windings and forces a longer “on” time to achieve the desired output voltage. In general, it is desirable to keep the primary voltage pulses as flattopped as possible. In this example, we will assume a permissible droop of dV. The equivalent flattopped current pulse that causes this droop is Ipft in Eq. . Then, because that current flows for , the required capacitor magnitude is simply Cb = () Consider an example assuming a 150W half bridge operating at 100 kHz from a nominal DC input of 320 V. At 15% low line, the DC input is 272 V and the primary voltage is 177。 半橋變換器拓?fù)? 工作原理 半橋變換器拓?fù)浣Y(jié)構(gòu)如圖 。 S1斷開時(shí)，輸入為 220V交流電壓，電路為全波整流電路，濾波電容 C1和 C2串聯(lián)，整流得到的直流電壓峰值約為 =308V；當(dāng) S1閉合時(shí) ，輸入為 120V交流電壓，電路相當(dāng)于一個(gè)倍壓整流器。通常的做法是在 C C2兩端各并接等值放電電阻來均衡兩者的電壓。為防止此現(xiàn)象發(fā)生，輸入電壓為最小時(shí)， Q1或Q2的最大導(dǎo)通時(shí)間必須限制在半周期的 80%以內(nèi)。如前所述， 輸入直流電壓最小時(shí)，每半周期導(dǎo)通時(shí)間最大值選為 。磁通不平衡在初級置位伏秒數(shù)與復(fù)位伏秒數(shù)不相等時(shí)發(fā)生。初級電流對該電容充電，導(dǎo)致初級電壓下降，下降幅度不應(yīng)該超過 10%（ dV為允許的下降量） 設(shè)允許的下降量為 dV，產(chǎn)生該壓降的等效平頂脈沖電流為式（ ）中的 Ipft，而流通該電流的時(shí)間為 ，這樣所需阻
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