【正文】 p to 4 channels injected group ? Single and continuous conversion modes 19 STM32的 ADC介紹 ? 自動從通道 0 到通道 ‘n’ 進行轉換的掃描模式 ? Channel by channel programmable sampling time and conversion order ? Discontinuous mode on regular and injected groups ? Selfcalibration ? Left or right Data alignment with inbuilt data coherency ? Analog Watchdog on high and low thresholds ? Interrupt generation on: ? End of Conversion ? End of Injected conversion ? Analog watchdog ? DMA capability (only on ADC1) 20 ADC Block Diagram TIM1_CC1 TIM1_CC2 TIM1_CC3 TIM2_CC2 TIM3_TRGO TIM4_CC4 TIM1_TRGO TIM1_CC4 TIM1_TRGO TIM2_CC1 TIM3_CC4 TIM4_TRGO ANALOG MUX GPIO Ports Temp Sensor VREFINT ADC Up to 4 Up to 16 Injected Channels Regular Channels JEXTRIG bit Start Trigger (injected group) VREF+ VREF VDDA VSSA ADC_IN0 ADC_IN1 ADC_IN15 . . . Ext_IT_15 Ext_IT_11 EXTRIG bit Start Trigger (regular group) JEXTSEL[2:0] bits EXTSEL[2:0] bits Injected data registers (4x12bits) Address/data bus Regular data register (12bits) DMA Request ADCCLK ADC Prescalers: Div2, Div4, Div6 and Div8 PCLK2 Analog Watchdog High Threshold register (12bits) Low Threshold register (12bits) AWD EOC JEOC AWDIE EOCIE JEOCIE Flags Interrupt enable bits Analog watchdog event End of injected conversion End of conversion ADC interrupt to NVIC 21 ADC Regular channels group ? Programmable number of regular channels: Up to 16 channels ? Programmable sample time and order of each channel in the conversion sequence ? Conversion started by: ? Software through start bit ? External trigger generated by: ? Timer1 CC1 ? Timer1 CC2 ? Timer1 CC3 ? Timer2 CC2 ? Timer3 TRGO ? Timer4 CC4 ? EXTI Line11 22 ADC Injected channels group ? Programmable number of injected channels: Up to 4 channels ? Programmable sample time and order of each channel in the conversion sequence ? Conversion started by: ? JAUTO: automatic injected conversion after regular channels conversion ? Software through start bit ? External trigger generated by: ? Timer1 TRGO ? Timer1 CC4 ? Timer2 TRGO ? Timer2 CC1 ? Timer3 CC4 ? Timer4 TRGO ? EXTI Line15 23 Analog sample time ? ADCCLK, up to 14MHz, taken from PCLK2 through a prescaler (Div2, Div4, Div6 and Div8) ? Three bits programmable sample time cycles for each channel: ? cycles ? cycles ? cycles ? cycles ? cycles ? cycles ? cycles ? cycles ? Total conversion = Sample time + cycles (fixed time) 14MHz and Sample time= ? total conversion: 1181。 ? FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG)。 ? void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)。 ? uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)。 ? void ADC_StartCalibration(ADC_TypeDef* ADCx)。 15 ADC庫函數 ? void ADC_DeInit(ADC_TypeDef* ADCx)。 /* ADC1 regular channel10 configuration */ ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_55Cycles5)。 13 使用 STM32 ADC的步驟 ? ADC_Init()初始化 , ADC_RegularChannelConfig()設置通道和轉化順序及時間， ADC_Cmd()使能 /* ADC1 configuration */ = ADC_Mode_Independent。通道和轉換順序在 ADC注入系列寄存器 (ADC_JSQR)中選擇。CLK控制器為 ADC時鐘提供一個專用的可編程預分頻器，預分頻值為： STM32的 ADC允許的最高時鐘頻率為 14MHz，若超過會降低精度，因此需要對 CLK進行分頻。 ? ADC 電源要求 : to V 。采樣時間可設置為： / / / ADC時鐘周期。每個組可以是這 16個通道中的任意一些通道以任意順序進行的組合。 = GPIO_Mode_AIN。 = 1。 /* Check the end of ADC1 calibration */ while(ADC_GetCalibrationStatus(ADC1))。 ? void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState)。 ? void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)。 ? void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)。 ? void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold)。s (14 cycles) ADC ADCCLK ADC Prescalers: