【正文】 這種能力允許例如下載固件，并讓開發(fā) 者為一個外部的 EEPROM 代入 代碼空間 的功能 。然而， OTP 是低收入和中等批量的 理想 應用， 當你 仍對設計的穩(wěn)定性不確定 是 可以成為一個有用的 中級 。然而，由于高的 NRE（非經(jīng)常性工程）的費用， 當成百上千 （或更多）臺設備需要時 帶 掩模 的 ROM 僅 有 成本效益 。 中斷向量 中斷向量位于 最后的 RAM 空間 ，地 址從 0FFE0h 到 0FFFEh。 信息存儲器（只有閃存器件 ） 在 39。你要認清你 的 堆棧將成為 有多大 。 目前，只有 2 位是落實在每一個字節(jié)。請記住，堆棧是在 RAM 中執(zhí)行。 我的 SP 有一個簡單的經(jīng)驗法則：不要管它。該指令集第 9 章 詳細 描述 ，每個基 數(shù) 有詳細的指令說明相互作用之間的 標志 和 命令 。 OscOff 關閉包括外設在內的一切。 這些狀態(tài)寄存器 的位是： ?進位標志（ C） 位： 0（ LSB） 功能：當運算結果產(chǎn)生進位時置位，可通過軟件或自動的設置或清除 。我 們將使用 R12 Mov P1IN,R12 。如果這 沒有執(zhí)行 ，代碼可以跳轉到一個意想不 到的位置。if R157,do not use PC switch Cmp 0,R15 。 W(S) value in R2 value in R3 00 ———— 0000h 01 (0) (absolute mode) 0001h 10 0004h 0002h 11 0008h 0FFFFh 程序計數(shù)器位于 R0 的。 這是 我以快速驗證算法寫的代碼，而不是 代碼，所以我沒有 記載充分 。 一般來說， 為了任何目的 你可以選擇這 些寄存器 中的 任何 一種 ，數(shù)據(jù)或地址。 ALU 的處理加， 減，比較和邏輯（與，或，異或）操作。經(jīng)過多年使用一或兩個工作寄存器，我非常喜歡我與 12個 16 位 CPU scratchpads 的第一次經(jīng)歷。430 家庭的所有成員的 CPU是完全 相同的。 部分編號慣例 MSP430 器件的數(shù)字部分為基礎來決定他們的能力。 這系列 從非常小的（ 1k ROM, 128 bytes for RAM，美分）到大到（ 60k ROM, 2k RAM，并在 10 美元的價格 范圍）的設備。 作為一個例子，這本書詳細描述 中斷功能，但假設你，讀者，已經(jīng)知道什么是中斷，以及如何使用它。use R12 as we please Rla R12 Rla R12 Mov R12amp。range checking Jge outofrange 。4xx devices throughout this book. Part Numbering Convention Part numbers for MSP430 devices are determined based on their capabilities. All device part numbers follow the following template: MSP430Mt Fa F bMc 山東建筑大學畢業(yè)設計外文文獻及譯文 2 M: Memory Type C: ROM F: Flash P: OTP E: EPROM (for developmental use. There are few of these.) F a, F b: Family and Features 10, 11: Basic 12, 13: Hardware UART 14: Hardware UART, Hardware Multiplier 31, 32: LCD Controller 33: LCD Controller, Hardware UART, Hardware Multiplier 41: LCD Controller 43: LCD Controller, Hardware UART 44: LCD Controller, Hardware UART, Hardware Multiplier Mc: Memory Capacity 0: 1kb ROM, 128b RAM 1: 2kb ROM, 128b RAM 2: 4kb ROM, 256b RAM 3: 8kb ROM, 256b RAM 4: 12kb ROM, 512b RAM 5: 16kb ROM, 512b RAM 6: 24kb ROM, 1kb RAM 7: 32kb ROM, 1kb RAM 8: 48kb ROM, 2kb RAM 9: 60kb ROM, 2kb RAM Example: The MSP430F435 is a Flash memory device with an LCD controller, a hardware UART, 16 kb of code memory, and 512 bytes of RAM. The part numbering scheme described above is a bit fragmented. There are mon features not consistently represented (type of ADC, number of timers, etc), and there are some other 山東建筑大學畢業(yè)設計外文文獻及譯文 3 inconsistencies (for example, the 33 family has the multiplier, but the 13 and 43s do not). I would remend against selecting parts based on their numbering scheme. Rather, once you have a vague idea of your requirements, go to the TI website (), and use their parametric sort feature. Architecture: CPU and Memory As discussed in chapter 1, the MSP430 utilizes a 16bit RISC architecture, which is capable of processing instructions on either bytes or words. The CPU is identical for all members of the 39。1xx, with a built in LCD driver. You will find these referred to as 39。t document it sufficiently. Now, it is relative gibberish. Don39。double R15again,since symbolic jmp is 2 words long Add R15,PC 。t fiddle with it manually after that. As long as you are wary of two stack conditions, the stack pointer manages itself. These two conditions are: Asymmetric push/pop binations. Every push should have a pop. If you push a bunch of variables, and fail to pop them back out, it will e back to haunt you. If you pop an empty stack, the SP moves out of RAM, and the program will fail. Stack encroachment. Remember, the stack is implemented in RAM. If your program has multiple interrupts, subroutine calls, or manual pushes, the stack will take up more RAM, potentially overwriting values your code needs elsewhere. Memory Structure Special Function Registers Special function registers are, as you might have guessed, memorymapped registers with special dedicated functions. There are, nominally, sixteen of these registers, at memory locations 0000h through 000Fh. However, only the first six are used. Locations 0000h and 0001h contain interrupt enables, and locations 0002h and 0003h contain interrupt flags. These are described in Chapter 3. Locations 0004h and 0005h contain module enable flags. Currently, only two bits are implemented in each byte. These bits are used for the USARTs. Peripheral Registers All onchip peripheral registers are mapped into memory, immediately after the special function registers. There are two types of peripheral registers: byteaddressable, which are mapped in the space from 010h to 0FFh, and wordaddressable, which are mapped from 0100h to 01FFh. RAM RAM always begins at location 0200h, and is contiguous up to its final address. RAM is used 山東建筑大學畢業(yè)設計外文文獻及譯文 10 for all scratchpad variables, global variables, and the stack. Some rules of thumb for RAM usage: The developer needs to be careful that scratchpad allocation and stack usage do not encroach on each other, or on global variables. Accidental sharing of RAM is a very mon bug, and can be difficult to chase down. You need to clearly understand how large your stack will bee. Be consistent about use. Locate the stack at the very end of the RAM space, and place your most monly used globals at the beginning. Never allocate more scratchpad than you need, and always deallocate as quickly as is reasonable. You can never have too much free RAM. Boot Memory (flash devices only) Boot memory is implemented in flash devices only, located in memory locations 0C00h through 0FFFh. It is the only hardcoded ROM space in the flash devices. This memory contains the bootstrap loader, which is used for prog