【正文】 字節(jié)必須要有一個應答 ACK。當 尋址 的被控器件不能應答時，數(shù)據(jù)保持為高并使主控器產生停止條件而終止傳輸。如果相同，該器件即認為自己被主控器尋址，而作為被控接收器或被控發(fā)送器則取決于 R/W 位。數(shù)據(jù)線時串行輸入 /輸出線。主控制器在天津大學仁愛學院 20xx 屆本科生畢業(yè)設計（論文） 14 READ信號上升沿和下一個下降沿之間讀出正確數(shù)據(jù)。接著開始下一個讀數(shù)據(jù)的過程。 [6] 圖 41 電導率儀顯示模塊軟件設計系統(tǒng)總框圖 電導率儀顯示模塊軟件設計系統(tǒng)工作時序是先由電導率儀探頭測定被測試液體的數(shù)據(jù)，然后將采集的數(shù)據(jù)轉換為 CS1621 液晶顯示器顯示模塊的顯示數(shù)據(jù)驅動碼，接著講轉換成的驅動碼送入 RAM 區(qū)， RAM 區(qū)的首地址是 $98，最后將 RAM 區(qū)的驅動碼通過 IIC 總線傳輸?shù)?CS1621 液晶顯示器顯示模塊，CS1621 液晶顯 示器顯示模塊接收到顯示驅動碼顯示相應的數(shù)據(jù)。 天津大學仁愛學院 20xx 屆本科生畢業(yè)設計（論文） 18 圖 44 IIC 總線寫數(shù)據(jù)時序流程圖 該框圖是傳輸 CS1621 液晶顯示器顯示模塊控制指令以及起始地址框圖，首先 CS 以及 WR 清 0， DATA 置 1，之后 WR置 1，以完成主控制器和 CS1621天津大學仁愛學院 20xx 屆本科生畢業(yè)設計（論文） 19 之間數(shù)據(jù)和命令禁止傳輸數(shù)據(jù)和初始化。 CS1621 液晶顯示器顯示模塊通過 IIC 總線與 Atmega8515 單片機控制器件連接起來，以特定的程序語言控制從最初采集被測液體數(shù)據(jù)到轉換成顯示驅動碼最后控制顯示模塊 CS1621 顯示電導率、溫度 。隨著我國國民經濟的發(fā)展，二次供水的水質監(jiān)測分析儀表 —電導率測量分析儀表顯得更為重要。 moreover a parison of the behavior of AVR microcontroller in fault injection experiments against some mon microprocessors is done. Results of fault analyzing will be used in the future research to propose the faulttolerant AVR microcontroller. Key words： AVR microcontroller， transient faults， VHDL language， sensitivity leve， faulttolerant AVR microcontroller In recent years, reliability is being the major factor in designing microprocessor and microcontroller architectures [1]. After critical bugs in Pentium FDIV in 1994 and Sun Microsystems in early 20xx [2] designers are concentrated to include faulttolerant techniques or alternatively they need an estimation of behavior of designed architecture against various faults. First step to design a faulttolerant architecture is to analyze the effects and propagations of faults in designed architecture. One of the best methods to estimate behavior of architecture against various faults is simulationbased fault injection that described the architecture in one of HDL languages such as VHDL or VERILOG and then injecting faults in desired points and observed important targets. We have used simulationbased fault injection since it has capability of high controllability and high observability pared to other fault injection methods. 華南理工大學畢業(yè)設計（論文） 2 Simulationbased fault injection is used in several works. In [3], an analysis of the effect of transient faults on Algha 21264 and AMD Athlon by simulationbased fault injection was characterized. An analysis of the effects of faults in the cache memories of the SPARC V8 architecture by simulationbased fault injection was reported in [4]. The effect of temporary faults located in the pipeline stages and cache memories is studied in [5]. In [6] fault injection using heavy ions proved the efficiency of the LEONFT microprocessor. In [7] the behavior of SEUs on the 8051 microcontroller protected by a single error correction code is analyzed. In [8] simulationbased fault injection in a 32bit processor, namely DP32 and an arithmetic processor called ARP is done and the effect of faults in the various points of these processors is reported. An analysis of the effects and propagation of faults in the 32bit OpenRisc1200 microprocessor by simulationbased fault injection is done in [9]. This paper presents an analyzing of fault effects and propagations in one of AVR microcontroller families, named ATmega103(L). This microcontroller is a good candidate for being studied, for several reasons: 1) This microcontroller is high performance and low power RISC architecture and has many useful peripheral features such as Analog parator, Watchdogtimer, Universal Asynchronous Receiver/Transmitter (UART) and etc [11], 2) This microcontroller is the most wellknown among industrial applications, 3) It is used in many highcritical applications in recent years, such as modern automotives [12], airplanes [13], air traffic controllers [14], military applications, hospital equipments, nuclear equipments [10, 14] that any bugs can effect serious damage on human life, therefore finding out behavior of the AVR microcontroller against various faults and tolerating AVR architecture against faults is necessary . The reminder of this paper is posed of four sections. Section 2 describes an overview of the AVR microcontroller architecture, section 3 presents the characteristics of simulationbased fault injection and fault characteristics. Fault injection results and data analyzing are presented in section 4 and finally section 5 concludes the paper. 華南理工大學畢業(yè)設計（論文） 3 Microcontroller Architecture AVR microcontroller is a highperformance and low power microcontroller which utilized Harvard architecture. AVRs are generally classified into four groups: 1) tinyAVRs, 2) megaAVRs, 3) xmegaAVRS and 4) specific AVRS. megaAVRs have special features not found on other members of the AVR families such as LCD controller, USB controller, CAN [10, 14], therefore a member of megaAVRs named ATmega103(L) is studied here. ATmega103(L) is a 8bit RISC architecture that executes powerful instruction set in a single clock cycle and this feature allowing the designer to optimize power consumption versus speed. Rich instruction set with 32 general working registers that are directly connected to the ALU and various addressing modes is a major architectural benefit in the design of ATmega103(L). An overview of the ATmega103(L) architecture is shown in Figure 1. It has 8bit DataBuss, 16bit Address Buss that feeds through DataBuss, 16bit Program Counter (PC), 12bit InstructionRegister (IR) and many additional features such as 128K bytes of insystem programmable flash, 4K bytes SRAM memory, real time counters, UART and etc. Figure 2 illustrates the core of ATmega103(L) without peripheral features, moreover fault injection points are shown in that figure. As shown in Figure 2, all points of core in AVR ATmega103(L) are chosen for fault injection and there