【正文】 hardware description language ? Boolean operations have syntax similar to C logical operations ? We’ll use it to describe control logic for processors Bit equal a b eq bool eq = (aamp。!b) HCL Expression – 33 – Processor BitLevel Multiplexor P273 Figure ? Control signal s ? Data signals a and b ? Output a when s=1, b when s=0 ? Its name: MUX ? Usage: Select one signal from a couple of signals Bit MUX b s a out bool out = (samp。b) HCL Expression – 34 – Processor Word Equality P274 Figure ? 32bit word size ? HCL representation ? Equality operation ? Generates Boolean value b31 Bit equal a31 eq31 b30 Bit equal a30 eq30 b1 Bit equal a1 eq1 b0 Bit equal a0 eq0 Eq = B A Eq WordLevel Representation bool Eq = (A == B) HCL Representation – 35 – Processor Word Multiplexor P275 Figure ? Select input word A or B depending on control signal s ? HCL representation ? Case expression ? Series of test : value pairs ? Output value for first successful test WordLevel Representation HCL Representation b31 s a31 out31 b30 a30 out30 b0 a0 out0 int Out = [ s : A。amp。 B C : B。amp。 1 : D3。 ID 8 implies no read or write performed ? Multiple Ports ? Can read and/or write multiple words in one cycle 187。amp。 c : C ] ? Evaluate test expressions a, b, c, … in sequence ? Return word expression A, B, C, … for first successful test – 45 – Processor Summary Computation ? Performed by binational logic ? Computes Boolean functions ? Continuously reacts to input changes Storage ? Registers ? Hold single words ? Loaded as clock rises ? Randomaccess memories ? Hold multiple words ? Possible multiple read or write ports ? Read word when address input changes ? Write word as clock rises 。 Same as A == B || A == C || A == D Word Expressions ? Case expressions ? [ a : A。 ? int A = intexpr 。 Minimum of 3 Words 4Way Multiplexor – 37 – Processor OF ZF SF OF ZF SF OF ZF SF OF ZF SF Arithmetic Logic Unit P278 Figure ? Combinational logic ? Continuously responding to inputs ? Control signal selects function puted ? Corresponding to 4 arithmetic/logical operations in Y86 ? Also putes values for condition codes ? We will use it as a basic ponent for our CPU A L U Y X X + Y 0 A L U Y X X Y 1 A L U Y X X amp。 !s1 : D1。 ]。 B A amp。 ]。a)||(!samp。b)||(!aamp。 b o u t = a || b o u t = ! aA n d Or N o tVoltage Time a b a amp。 64bit word sizes (overe address space limitations) 187。Architecture (I) Processor Architecture – 2 – Processor Goal Understand basic puter anization ? Instruction set architecture Deeply explore the CPU working mechanism ? How the instruction is executed: sequential and pipeline version Help you programming ? Fully understand how puter is anized and works will help you write more stable and efficient code. – 3 – Processor CPU Design (Why?) It is interesting. Aid in understanding how the overall puter system works. Many design hardware systems containing processors. Maybe you will work on a processor design. – 4 – Processor CPU Design Instruction set architecture Logic design Sequential implementation Pipelining and initial pipelined implementation Making the pipeline work Modern processor design – 5 – Processor Suggested