【正文】 analyze some traditional gray modulation method such as traditional voltage amplitude, pulse width modulation and the analysis of the factors of improvement of TFT LCD display system, using hybrid variety of traditional gray modulation method is presented to increase the TFT LCD display grayscale method, focuses on the dynamic jitter in the mixed gray modulation processing, and presents a hybrid algorithm for calculating grayscale modulation of the FPGA implementation scheme. In this paper ,we proposed and studied a kind of time and space on a mix of gray modulation TFT LCD display platform. In the design of the whole TFT LCD structure and mixed gray modulation principle, on the basis of the experiment adopted series of ALTERA pany Cyclone FPGA as the core controller, with the Quartus II software for FPGA design platform, using the topdown FPGA design method, designed with the FPGA as the core of TFT LCD display system. Combined with the mixed gray modulation principle, developed on the basis of AD9984A VGA data collection, AD conversion module, digital image preprocessing module, FIFO control module, an LVDS control module and the main functional modules, such as mixing gray modulation algorithm realizing the collection of the analog image signal VGA, modulus conversion, storage, and mixed gray modulation, improves the resolution of the image as well as system integration and stability. Finally, the paper set up the hardware platform of the whole system, test and verify on the TFT LCD system. From prehensive and simulation results of FPGA and TFT LCD display, the system can be worked accurately and reliable, and the system have a certain degree to improve the effect of display gray, preliminary reached the expected goal. Key words: TFTLCD； Hybrid Grayscale Modulation； Dithering algorithm； FPGA計算機信息工程學院畢業(yè)設計說明書 I 第一章．緒論 ......................................................... 1 研究背景 .............................................................. 1 研究內(nèi)容及意義 ........................................................ 1 論文安排 .............................................................. 2 第二章 FPGA 開發(fā)技術(shù)及硬件描述語言 ...................................... 4 FPGA 簡介 ............................................................. 4 QUARTUS II 開發(fā)平臺 .................................................... 4 FPGA 設計流程圖 ....................................................... 5 硬件描述語言 VERILOG HDL ................................................ 7 Verilog 硬件描述語言的主要能力 .................................... 7 模塊設計 .......................................................... 8 小結(jié) .................................................................. 8 第三章 灰度調(diào)制 ....................................................... 9 傳統(tǒng)灰度調(diào)制方法 ...................................................... 9 傳統(tǒng)灰度調(diào)制介紹 .................................................. 9 傳統(tǒng)灰度調(diào)制比較 ................................................. 10 混合灰度調(diào)制 ......................................................... 11 混合灰度調(diào)制原理 ................................................ 11 混合灰度調(diào)制數(shù)據(jù)處理過程 ........................................ 12 小結(jié) ................................................................. 12 第四章 TFTLCD圖像顯示系統(tǒng)硬件設計 .................................... 13 總體設計方案 ......................................................... 13 VGA 信號采集及 D/A 轉(zhuǎn)換模塊 .......................................... 13 AD9984A 的器件特性與結(jié)構(gòu) ........................................ 13 AD9984A 的寄存器配置 ............................................ 14 AD9984A 接口電路設計 ............................................ 18 數(shù)據(jù)存儲模塊 ......................................................... 19 FIFO 控制模塊 .................................................... 19 SDRAM 模塊電路設計 ............................................... 19 LVDS 接口電路設計 .................................................... 20 系 統(tǒng)電路設計 ......................................................... 21 系統(tǒng)的 PCB 設計 ....................................................... 23 計算機信息工程學院畢業(yè)設計說明書 II 小結(jié) ................................................................ 24 第五章 TFTLCD 圖像顯示系統(tǒng)軟件設計 ................................... 25 FIFO 控制及數(shù)據(jù)存儲模塊 ............................................. 25 FIFO 控制模塊工作原理 ........................................... 25 SDRAM 讀寫模塊 ................................................... 26 數(shù)字圖像預處理模塊 .................................................. 27 混合灰度調(diào)制模塊 .................................................... 28 小結(jié) ................................................................ 28 第六章 抖動技術(shù)的實現(xiàn) ............................................... 29 抖動算法 ............................................................ 29 傳統(tǒng) BAYER抖動算法 ................................................... 29 傳統(tǒng) Bayer 抖動算法具體實現(xiàn)方法 .................................. 29 傳統(tǒng) Bayer 抖動算法的優(yōu)缺點及改進方法 ............................ 30 動態(tài)旋轉(zhuǎn)抖動矩陣 .................................................... 31 動態(tài)抖動矩陣基本原理 ............................................. 31 動態(tài)抖動矩陣具體實現(xiàn) ............................................. 33 小結(jié) ................................................................ 37 第七章 系統(tǒng)功能模塊仿真與 FPGA 驗證 .................................... 38 抖動算法功能模塊仿真 ................................................ 38 Bayer 抖動算法波形仿真 ........................................... 39 動態(tài)抖動矩陣算法波形仿真 ........................................ 40 FPGA 平臺驗證 ....................................................... 41 小結(jié) ................................................................ 43 第八章 總結(jié)與展望 ................................................... 44 總結(jié) ................................................................ 44 展望 ................................................................ 44 致謝 .....................