外文資料翻譯--基于c51兼容微處理器單片機(jī)的pwm控制器設(shè)計(jì)-單片機(jī)-全文預(yù)覽
【正文】 enerator. The separate case is achieved by the channelselect logic shown in Fig. 6. The PWM I/O pins are set to independent mode by default upon advice reset. The deadtime generator is disabled in the Independent mode. The simulation result is shown in Figure 6 as the following Tr4 and tr3 are run bits to PWM0 and PWM1, respectively. Actually, from this diagram, Pin P1[5]/ P1[4] of MCU is used for PWMH/ PWML or normal I/O ,alternatively. Fig6 the Waveform of PWM Outputs in Independent Mode Complementary PWM Output Mode The Complementary Output mode is used to drive inverter loads similar to the one shown in Figure 7. This inverter topology is typical for DC applications. In Complementary Output Mode, the pair of PWM outputs cannot be active simultaneously. The PWM channel and output pin pair are internally configured through channelselect logic as shown in Figure7. A deadtime may be optionally inserted during device switching where both outputs are inactive for a short period. Fig 7 : Typical Load for Complementary PWM Outputs The Complementary mode is selected for PWM I/O pin pair by setting the appropriate CPWM bit in PWMCON. In this case, PSEL is in effect. PWMH and PWML will e from PWM0 generator when PSEL is set to zero, when the signals from PWM1 generator is useless, whereas PWMH and PWML will e from PWM1 generator when PSEL is set to 1, when the signals from PWM0 generator is useless. In the process of producing the PWM outputs in Complementary Mode, the deadtime will be inserted to be discussed in the following section. Deadtime Control Deadtime generation is automatically enabled when PWM I/O pin pair is operating in the Complementary Output mode. Because the power output devices cannot switch instantaneously, some amount of time must be provided between the turnoff event of one PWM output in a plementary pair and the turnon event of the other transistor. The 2output PWM module has one programmable deadtime with 8bit plementary output pair for the PWM module has an 8bit down counter that is used to produce the deadtime insertion. As shown in Figure 8, the dead time unit has a rising and falling edge detector connected to PWM signal from one of PWM generator. The dead times is loaded into the timer on the detected PWM edge event. Depending on whether the edge is rising or falling, one of the transitions on the plementary outputs is delayed until the timer counts down to zero. A timing diagram indic
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