【正文】 a delaylocked loop (DLL) is frequently used. Clock generation Many electronic systems include processors of various sorts that operate at hundreds of megahertz. Typically, the clocks supplied to these processors e from clock generator PLLs, which multiply a lowerfrequency reference clock (usually 50 or 100 MHz) up to the operating frequency of the processor. The multiplication factor can be quite large in cases where the operating frequency is multiple gigahertz and the reference crystal is just tens or hundreds of megahertz. Spread spectrum All electronic systems emit some unwanted radio frequency energy. Various regulatory agencies (such as the FCC in the United States) put limits on the emitted energy and any interference caused by it. The emitted noise generally appears at sharp spectral peaks (usually at the operating frequency of the device, and a few harmonics). A system designer can use a spreadspectrum PLL to reduce interference with highQ receivers by spreading the energy over a larger portion of the spectrum. For example, by changing the operating frequency up and down by a small amount (about 1%), a device running at hundreds of megahertz can spread its interference evenly over a few megahertz of spectrum, which drastically reduces the amount of noise seen on broadcast FM radio channels, which have a bandwidth of several tens of kilohertz. Clock distribution Typically, the reference clock enters the chip and drives a phase locked loop (PLL), which then drives the system39。 in space munications for coherent demodulation and , bit synchronization, and symbol synchronization. Phaselocked loops can also be used to demodulate frequencymodulated signals. In radio transmitters, a PLL is used to synthesize new frequencies which are a multiple of a reference frequency, with the same stability as the reference frequency. Other applications include: ? Demodulation of both FM and AM signals ? Recovery of small signals that otherwise would be lost in noise (lockin amplifier) ? Recovery of clock timing information from a data stream such as from a disk drive ? Clock multipliers in microprocessors that allow internal processor elements to run faster than external connections, while maintaining precise timing relationships ? DTMF decoders, modems, and other tone decoders, for remote control and telemunications Clock recovery Some data streams, especially highspeed serial data streams (such as the raw stream of data from the magic head of a disk drive), are sent without an acpanying clock. The receiver generates a clock from an approximate frequency reference, and then phasealigns to the transitions in the data stream with a PLL. This process is referred to as clock recovery. In order for this scheme to work, the data stream must have a transition frequently enough to correct any drift in the PLL39。s frequency control circuit. Some technologies are known to perform better than others in this regard. The best digital PLLs are constructed with emittercoupled logic (ECL) elements, at the expense of high power consumption. To keep phase noise low in PLL circuits, it is best to avoid saturating logic families such as transistortransistor logic (TTL) or CMOS.[citation needed] Another desirable property of all PLLs is that the phase and frequency of the generated clock be unaffected by rapid changes in the voltages of the power and ground supply lines, as well as the voltage of the substrate on which the PLL circuits are fabricated. This is called substrate and supply noise rejection. The higher the noise rejection, the better. To further improve the phase noise of the output, an injection locked oscillator can be employed following the VCO in the PLL. Frequency Synthesis In digital wireless munication systems (GSM, CDMA etc.), PLLs are used to provide the local oscillator for upconversion during transmission and downconversion during reception. In most cellular handsets this function has been largely integrated into a single integrated circuit to reduce the cost and size of the handset. However, due to the high performance required of base station terminals, the transmission and reception circuits are built with discrete ponents to achieve the levels of performance required. GSM local oscillator modules are typically built with a frequency synthesizer integrated circuit and discrete resonator VCOs. Frequency synthesizer manufacturers include Analog Devices, National Semiconductor and Texas Instruments. VCO manufacturers include Sirenza, ZCommunications, Inc. Phaselocked