【正文】 limited only by the noise of the system. In any case, the offset referred to the input is less than 10181。A of quiescent current. They can supply 20181。A, and the exact value of integrating resistor may be chosen by: Integrating Capacitor The product of integrating resistor and capacitor should be selected to give the maximum voltage swing which ensures that the tolerance builtup will not saturate the integrator swing (approx. from either supply). For +5V supplies and analog COMMON tied to supply ground, a + to +4V full scale integrator swing is fine, and F is nominal. In general, the value of CINT is given by: A very important characteristic of the integrating capacitor is that it has low dielectric absorption to prevent rollover or ratiometric errors. A good test for dielectric absorption is to use the capacitor with the input tied to the reference. This ratiometric condition should read half scale , and any deviation is probably due to dielectric absorption. Polypropylene capacitors give undetectable errors at reasonable cost. Polystyrene and polycarbonate capacitors may also be used in less critical applications. AutoZero and Reference Capacitor The physical size of the autozero capacitor has an influence on the noise of the system. A larger capacitor value reduces system noise. A larger physical size increases system noise. The reference capacitor should be large enough such that stray capacitance to ground from its nodes is negligible . The dielectric absorption of the reference cap and autozero cap are only important at poweron or when the circuit is recovering from an overload. Thus, smaller or cheaper caps can be used here if accurate readings are not required for the first few seconds of recovery. Reference Voltage The analog input required to generate a full scale output is REFIN VV 2? The stability of the reference voltage is a major factor in the overall absolute accuracy of the converter. For this reason, it is remended that a high quality reference be used where highaccuracy absolute measurements are being made. Rollover Resistor and Diode A small rollover error occurs in the ICL7135, but this can be easily corrected by adding a diode and resistor in series between the INTegrator OUTput and analog COMMON or ground. The value shown in the schematics is optimum for the remended conditions, but if integrator swing or clock frequency is modified, adjustment may be needed. The diode can be any silicon diode such as 1N914. These ponents can be eliminated if rollover error is not important and may be altered in value to correct other (small) sources of rollover as needed. Max Clock Frequency The maximum conversion rate of most dualslope A/D converters is limited by the frequency response of the parator. The parator in this circuit follows the integrator ramp with a 3181。V input, 2 to 3 with a 250181。V. Much of the noise originates in the autozero loop, and is proportional to the ratio of the input signal to the reference. Analog And Digital Grounds Extreme care must be taken to avoid ground loops in the layout of ICL7135 circuits, especially in highsensitivity circuits. It is most important that return currents from digital loads are not fed into the analog ground line. Power Supplies The ICL7135 is designed to work from +5V supplies. However, in selected applications no negative supply is required. The conditions to use a single +5V supply are: 1. The input signal can be referenced to the center of the mon mode range of the converter. 2. The signal is less than +. 外文資料譯文 ICL7135 4 1/2 Digit, BCD Output, A/D Converter ICL7135是由 INTERSIL公司生產(chǎn)的高精度 A/D轉(zhuǎn)換器， 它的 雙斜率積分 轉(zhuǎn)換可靠性 可達(dá)到在 20,000計(jì)數(shù) 中有 +1的誤差，另外加上它的 數(shù)字軀動(dòng)輸出端以及多路復(fù)用的二一十進(jìn)制碼 (BCD)輸出端，就可以 應(yīng)用于數(shù)字電壓表，數(shù)字電流表的顯示 。v. 零點(diǎn)漂移小于 1 181。 特點(diǎn)： * 在 20,000計(jì)數(shù) 中有 +1的誤差（ 2V滿(mǎn)量程） * 0v輸入零讀數(shù) * IPA典型輸入電流 * 真正差分輸入 * 需要的唯一參考電壓 * Over range和 Under range信號(hào) 的 自動(dòng)范圍能力 * TTL兼容性 * 控制信號(hào)允許與 UARTS或微處理器接口 * 多路復(fù)用 二十進(jìn)制代碼 (BCD)輸出 * 無(wú)鉛 工藝 詳細(xì)描寫(xiě) 模擬部分 每個(gè)測(cè)量周期被劃分成四個(gè)階段。第二，基準(zhǔn)電容被充電至基準(zhǔn)電壓。自動(dòng)調(diào)零精度僅受系統(tǒng)噪聲的限制。 內(nèi)部的 IN+和 IN輸入被連接至外部引腳。 IN連接至模擬地以建立正確的共模電壓。所記錄的輸入信號(hào)的極性確保以正確的極性 連接電容以便積分器輸出極性回到零，輸出返回至零所需的時(shí)間正比于輸入信號(hào)的幅度，返回時(shí)間顯示為數(shù)宇讀數(shù)并由等式 10000（ VIN/VREF）確定。通常這一相需要 100至 200個(gè)時(shí)鐘脈沖。差分和共模電壓二者均使積分器的輸出擺動(dòng)。為這些重要應(yīng)用與一些精確損失 ，建議使用的 4V全方位擺 動(dòng) 可以減少積分器擺 動(dòng) 。用這種方式消除共模電壓可稍微提高轉(zhuǎn)換精度。 icl7135的 引腳允許其方便地 應(yīng)用 在更復(fù)雜的系統(tǒng)。然后。當(dāng)此正脈沖發(fā)生于測(cè)量周期（ 40002個(gè)脈沖）完成之前時(shí) .它將不被識(shí)別。如果 RUN/HOLD為低電平，且在積 分完成后第 101個(gè)計(jì)數(shù)以后，即在第一個(gè) STROBE脈沖之后。 在開(kāi)始 101個(gè)計(jì)數(shù)之后。這種 STROBE脈沖的放置還確保第二個(gè) MSD的 BCD位也不競(jìng)爭(zhēng) BCD線并且確保正確位的鎖存。因此。 BUSY (21腳 ) 在信號(hào)積分相開(kāi)始時(shí) BUSY(忙 )輸出變?yōu)楦唠娖健? OVERRANGE (27腳 ) 當(dāng)輸入信號(hào)大于 2V滿(mǎn)量程時(shí)，該管腳信號(hào)變?yōu)楦唠娖?。且在下一次測(cè)量周期的去積分 (de integrate )相開(kāi)始時(shí)變?yōu)榈碗娖健? POLARlTY (23腳 ) 對(duì)于正輸入信號(hào)時(shí) .POLARITY(極性 )輸出為高電平。空在這一點(diǎn)上應(yīng)小于 LSB。除非發(fā)生超范圍 ,否則此順序過(guò)程將繼續(xù)下去。 BCD (13, 14, 15 and 16腳 ) 在這些輸出端給定數(shù)字的 BCD位 (B1, B2, B4和 B8)被順序激活。這些值必須選擇，以配合特別 時(shí) 應(yīng)用。A的電流。A 具有大容限和高介質(zhì)吸收的電容器可能使轉(zhuǎn)換不精確。聚苯乙烯和聚碳酸脂電容器具有較高的介質(zhì)吸收，但也能良好的工作。 除了在上電或過(guò)載恢復(fù)期間之外 .參考電容和自動(dòng)調(diào)零電容的介質(zhì)吸收并不重要。 基準(zhǔn)電壓 模擬輸入要產(chǎn)生一個(gè)滿(mǎn)量程輸出，則應(yīng)使 REFIN