freepeople性欧美熟妇, 色戒完整版无删减158分钟hd, 无码精品国产vα在线观看DVD, 丰满少妇伦精品无码专区在线观看,艾栗栗与纹身男宾馆3p50分钟,国产AV片在线观看,黑人与美女高潮,18岁女RAPPERDISSSUBS,国产手机在机看影片

正文內(nèi)容

大學(xué)學(xué)士學(xué)位論文_基于nios_ii系統(tǒng)的mp3播放器的設(shè)計(jì)-wenkub

2022-09-11 16:43:00 本頁面
 

【正文】 開發(fā)平臺 進(jìn)行設(shè)計(jì) , 并 利用板上的 SD 卡 作為存儲設(shè)備,在 Nios II 處理器上實(shí)現(xiàn) MP3 的播放 、 TXT 文件的讀取以及 LCD 液晶顯示等功能。xx 大學(xué)學(xué)士學(xué)位論文 I 基于 Nios II 系統(tǒng)的 MP3 播放器的設(shè)計(jì) 摘要 近年來, 數(shù)碼產(chǎn)品更新?lián)Q代 的速度 很快,從當(dāng)初的分立元件到現(xiàn)在的集成芯片, 產(chǎn)品 體積越來越小,而所展現(xiàn)出來的功能則日益強(qiáng)大。 硬件設(shè)計(jì)主要 利用 SOPC Builder,將處理器、存儲器和其它所需的外設(shè) IP核 添加進(jìn)去 ,生成一個(gè)完整的自己定制的 Nios II 軟核 系統(tǒng)。 軟硬件協(xié)同設(shè)計(jì)協(xié)調(diào)軟硬件開發(fā)過程并行開展,一方面可以縮短設(shè)計(jì)周期,極大地提高設(shè)計(jì)效率 ; 另一方面可以根據(jù)系統(tǒng)各個(gè)部分的特點(diǎn)和設(shè)計(jì)約束,選擇軟件或者硬件實(shí)現(xiàn)方式,得到高性能,低成本的優(yōu)化設(shè)計(jì)方案。s DE2 development platform using the SD card on the board as store equipment to achieve functions like MP3 playing,txt file reading and LCD displaying. Hardware design is pleted in Sopc Builder, Through adding the processor、memory and other IP cores of the peripherals to their own customized SOPC control system , generating a Nios II softcore systems of customized pletely. Combined with Quartus II EDA tools, we can precisely meet the demand of the customized system after download the core into the FPGA design of the software part was pleted in the Nios II IDE environment, and functions like reading the TXT and MP3 files stored in the SD card,LCD displaying,MP3 music playing and buttons controlling can be achieved. All of this can be programmed by C. This thesis Emphasize on the following key techniques in hardware/software codesign, it is the integration of specification, synthesis and simulation of hardware and software with unified design tools. By using hardware/software codesign, the design cycle can be shortened and design efficiency can be improved. On the other hand, designers can choose hardware or software implication method for system functions according the characteristic of function and the design constraints, in order to achieve high performance, low cost design. Through applying the SOPC design concept into the process of designing digital products, period of the development process can be shortened. Needs of the upgrading technology can be met at the same time. It39。 Hardware/software Codesign xx 大學(xué)學(xué)士學(xué)位論文 III 目錄 摘要 ....................................................................................................................... I Abstract ................................................................................................................II 第 1 章 緒論 ........................................................................................................ 1 課題背景 ................................................................................................... 1 可編程片上系統(tǒng) ................................................................................ 1 軟硬件協(xié)同設(shè)計(jì) ................................................................................ 2 嵌入式系統(tǒng) ........................................................................................ 2 MPEG Layer 3 .................................................................................... 3 國內(nèi)外文獻(xiàn)綜述 ....................................................................................... 4 論文研究內(nèi)容 ........................................................................................... 5 第 2 章 SOPC 技術(shù)及軟硬件協(xié)同方案 ............................................................. 6 FPGA 器件基本原理 ................................................................................. 6 Sopc 設(shè)計(jì) 技術(shù) ........................................................................................... 6 軟硬件協(xié)同技術(shù) ....................................................................................... 9 本章小結(jié) ................................................................................................. 10 第 3 章 MP3 播放器硬件系統(tǒng)設(shè)計(jì)方案 ......................................................... 11 MP3 原理 ................................................................................................. 11 MP3 播放器的系統(tǒng)需求 ......................................................................... 11 MP3 播放器的軟硬件劃分及組成模塊介紹 ......................................... 12 MP3 解碼硬件電路方案設(shè)計(jì)及實(shí)現(xiàn) .............................................. 12 I2C 總線協(xié)議及應(yīng)用 ........................................................................ 14 SD 卡簡介及 FAT16 文件系統(tǒng)構(gòu)成介紹 ........................................ 16 系統(tǒng)硬件結(jié)構(gòu)設(shè)計(jì) ................................................................................. 20 基于 Nios II 的軟硬件協(xié)同設(shè)計(jì)策略 .................................................... 21 本章小結(jié) ................................................................................................. 23 第 4 章 系統(tǒng)軟件設(shè)計(jì)及實(shí)現(xiàn) .......................................................................... 24 系統(tǒng)整體程序流程圖 ............................................................................. 24 各功能模塊設(shè)計(jì)方案 ............................................................................. 24 讀取 SD 卡方案 ............................................................................... 24 LCD16027 液晶模塊顯示 ................................................................ 25 播放 MP3 音樂方案 ........................................................................ 26 通過 I2C 總線與 STA013 通訊 ....................................................... 28 本章小結(jié) ................................................................................................. 28 第 5 章 系統(tǒng)設(shè)計(jì)的實(shí)現(xiàn)及調(diào)試 ...................................................................... 29 SOPC Builder 下定制系統(tǒng)模塊 .............................................................. 29 DE2 資源 .......................................................................................... 29 系統(tǒng)的定制及生成 .......................................................................... 30 xx 大學(xué)學(xué)士學(xué)位論文 IV 硬件系統(tǒng)編譯 .................................................................................. 31 FPGA 的配置 .................................................................................... 37 Nios II 下的程序開發(fā) .............................................................................. 37 本章小結(jié) ..................................
點(diǎn)擊復(fù)制文檔內(nèi)容
環(huán)評公示相關(guān)推薦
文庫吧 www.dybbs8.com
備案圖片鄂ICP備17016276號-1