【正文】 附錄ALow Power 260k Color TFT LCD Onechip Driver ICAbstractIn this study, we present a 260 kcolor TFT LCD onechip driving IC that consumes under 5 mW in the module, which is exceptionally low power consumption. To reduce power consumption, we used many powerlowering schemes in the logic and analog design. A driver IC for driving LCDs has a builtin graphic SRAM. Besides write and read operations, the graphic SRAM has a scan operation that is similar to the read operation of one rowline, which is displayed on one line in an LCD panel. Currently, the embedded graphic memory is implemented by an 8transistor leaf cell and a 6transistor leaf cell. We propose an efficient scan method for a 6transistor embedded graphic memory that is greatly improved over previous methods. The IC is implemented in a um process. The mixed process is firstly used in world.Current telemunication technology has improved amazingly. These improvements have revitalized handheld modules and increased services. Because of this, it is even more important that the chip enable voice munication, data, graphic images, and moving pictures. To use a handheld module for a longer time, each chip needs to bee smaller and consume less power.Improvements in telemunications have made display technology improve too. The size of display equipment has bee bigger and the resolution higher. Due to this, power consumption of display equipment has also bee higher. Power reduction for display equipment has bee a very important issue. The display equipment in handheld phones is super twisted nematic (STN) and thin film transistor (TFT) LCDs. Electroluminescence will be a practical utility. Display material can have an altered arrangement according to the level of voltage or the amount of current. In accordance with the arrangement, the rate of a transmission changes. We can control the brightness of a display panel, and the black/white display panel is implemented with this method. The multicolor display panel is implemented by arranging an RGB(red, green and blue) color filter. The color rectangular panel is supplied by rowdirect voltage and columndirect. voltage. The difference of the two direct voltages is the driving voltage of the pixels. This method is called multiplex addressing. The LCD driver IC generates and supplies the voltage level. This paper presents a 260 kcolor TFT LCD onechip driver module that consists of a gate driver and source driver. The gate driver generates the driving voltage of column direction and mon voltage. Figure 1 shows how the TFT array is constructed. The gate driving voltage is of two types: a selected level and a nonselected level. The level of these voltages is determined by the characteristics of each panel. When one gate line is selected, the source IC drives data voltage levels that are valued by decoding stored data. The different voltage of the gate’s selected level and source’s data level determine the display material arrangement.Currently, With a higher color resolution, the embedded memory capacity needs to be bigger in the LCD driver IC. With a larger memory capacity, the metal line from the logic part to the memory needs to be longer. Because of this, the embedded graphic memoryaddressing block, the embedded graphic memory control block in the logic, and a time control block in the embedded graphic memory bees more important in designing the embedded graphic memory. The internal control block in the embedded graphic memory is especially important in AC characterization. The power consumption of the merged memory also bees a very important issue. With a higher resolution and bigger panel, a bigger embedded memory size is necessary. Because of this, shrinking the RAM size is a dominant factor in the chip size of a driver IC. Because of these factors, the architecture of the embedded memory was improved from a 8transistor SRAM architecture to a 6transistor SRAM architecture.In this paper, section II presents the architecture of graphic driving IC. Section III discusses the architecture of the 8transistor/6transitor embedded graphic SRAM and the architectural defect of the write/read/scan method in 6transistor architecture. In section IV, a low power scan method in 6transistor architecture is proposed. In this chapter, another low power accessed method is proposed. In Chapter V, the implemented sample is pared in p