【正文】 FPGA Implementation of RealTime Adaptive Image Thresholding Elham Ashari Department of Electrical and Computer Engineering, University of Waterloo Richard Hornsey Department of Computer Science amp。 Engineering, York University ABSTRACT A general purpose FPGA architecture for realtime thresholding is proposed in this paper. The hardware architecture is based on a weightbased clustering threshold algorithm that takes the thresholding as a problem of clustering background and foreground pixels. This method employs the clustering capability of a twoweight neural work to find the centriods of the two pixel groups. The image threshold is the average of these two centriods. The proposed method is an adaptive thresholding technique because for every input pixel the closest weight is selected for updating. Updating is based on the difference between the input pixel gray level and the associated weight, scaled by a learning rate factor. The hardware system is implemented on a FPGA platform and consists of two functional blocks. The first block is obtaining the threshold value for the image frame, another block applies the threshold value to the frame. This parallelism and the simple hardware ponent of both blocks make this approach suitable for realtime applications, while the performance remains parable with the Otsu technique frequently used in offline threshold determination. Results from the proposed algorithm are presented for numerous examples, both from simulations and experimentally using the FPGA. Although the primary application of this work is to centroiding of laser spots, its use in other applications will be discussed. Keywords: Real time thresholding, Adaptive thresholding, FPGA implementation, neural work. 1 INTRODUCTION Image binarization is one of the principal problems of the image processing applications. For extracting useful information from an image we need to divide it into distinctive ponents . background and foreground objects for further analyses. Often the gray level pixels of the foreground objects are quite different from background. Several superior methods for image binarization have been reported [1]. The main goal of most of these is high efficiency in term of performance rather than speed. However for some applications, especially those involving customized hardware and real time applications, the speed is the key requirement. The implementation of a fast and simple thresholding technique has many applications in practical imaging systems. For example, onchip image processing integrated with CMOS imager sensors is prevalent in a variety of imaging system. In such systems the realtime processing and related information are vital. Applications employing realtime thresholding include robotics, automobiles, object tracking, and laser range finding. In laser range finding where the range of an object in motion is determined, the captured image is binarized. The thresholding technique is applied to separate the laser spot from the background and to locate the spot centroid. This application is the scenario of interest in the rest of this paper. Another application of real time thresholding is document processing and Optical Character Recognition (OCR). For example a highspeed scanner can scan and process over one hundred pages per minute. The speed requirement in this system imposes a dedicated hardware for image processing and binarization. Typically image captured from scanners by CMOS or CCD camera are converted to binary images. A document consists of text on a relatively uniform background. Therefore converting it to a binary image is suitable for output and storage because it significantly reduces size without loss of important data. All of the mentioned applications have one thing in mon. The high performance and high precision systems dictate an efficient and fast algorithm for thresholding. They also use the image binarization as preprocessing step prior to further processing. Therefore they have to be able to separate the objects from background by calculating an optimum threshold value to avoid losing important information (such as object dimensions and shape). This paper presents new technique for image thresholding in realtime applications. The thresholding technique is implemented in an FPGA. Section 2 provides an overview of image binarization. Wellknown image thresholding techniques and their performance {evaluation} are discussed. Section 3 describes the proposed algorithm for thresholding techniques. The performance of the proposed algorithm in parison with other methods is discussed. Section 4 presents FPGA implementation of the proposed algorithm. Experimental results for implemented hardware concentrating on the functional performance are discussed. The hardware performance in terms of speed and area are pointed out. Section 5 draws some key conclusion remarks from the work presented in this paper. The results of the research are summarized and pros and cons are highlighted. 2 PROBLEM STATEMENT The objective of image binarization is to divide an image into two groups, foreground or object, and background. In image processing applications, the gray level values assigned to an object are different from the gray level values of the background. Therefore thresholding can be considered as an effective way to separate foreground and background. The output of a thresholding process is a binary image which is obtained by assigning pixels with values less than the threshold with zeros and the remaining pixels with ones. Let us consider image f of size MxN (M rows and N columns) with L gray levels in the range [0, L1]. The gray level or the brightness of a pixel with coordinates (i,j) is denoted by f(i,j). The threshold, T, is a value in the range of [0, L1]. {Now,} the