【正文】 s ho w n i n F i g3 5A 3. A Harvard type . A conventional Princeton puter Program memory Data memory CPU Inputamp。 Output unit memory CPU Inputamp。 Output unit Reset Interrupts Power Fig35A3. Principal features of a microputer Read only memory (ROM). R O M i s us uall y for the p er ma ne nt, no n vol a tile s tor a ge o f a n a ppli ca ti o ns pro gra m . Ma ny mi c ro co mp ute rs a nd micr oc o ntr olle rs a re i nte nde d for hi gh v ol ume a ppli ca ti o ns a nd he nce the ec o no mic al ma nu fa c ture o f the de vice s re q uir es tha t the co nte nts o f the pr o gr a m me mo r y b e co mmi tte d p er ma ne ntl y d uri ng the ma nufa c tur e o f c hi ps . C le arl y, this i mpli es a ri go ro us ap pro ac h to R O M c od e dev elo p me nt si nc e c ha nge s ca nno t be ma de a fter ma nufa c ture . T hi s dev elo p me nt p ro cess ma y i nv olv e e mul a ti o n usi ng a so p his ti ca ted dev elo p me nt s ys te m w i th a hardw a re e mul a tio n cap abil i ty as w ell a s the us e o f p o w e rful s o ftw a re to o l s . S o me ma nufa c turer s pro vid e a ddi tio nal R O M o p tio ns b y i ncl udi ng i n the ir r a nge d evi ces w i th (or i nte nd ed for use w i th) us er p ro gra mma b l e me mo r y. T he si mpl es t o f thes e is us uall y de vic e w hic h c a n o per a te i n a micr opr oc es s or mo d e b y usi ng s o me o f the i np ut/o utp ut li ne s as a n ad dre ss a nd d a ta b us for ac ces si ng e xter nal me mo r y. T hi s type o f devi ce ca n b e ha ve func ti o na ll y as the si ngl e c hip micr oc o mp uter fro m w hi c h i t is deri ve d al bei t w i th res tric te d External Timing ponents System clock Timer/ Counter Serial I/O Prarallel I/O RAM ROM CPU I/ O a nd a mo di fie d e xter nal cir c ui t. T he use o f thes e R O Mle ss d evi ces is co mmo n e v e n i n pr od uc ti o n cir c ui ts w here the v ol ume do es no t j us ti fy the d ev elo p me nt co s ts o f c us to m o n c hip R O M。ther e ca n s till be a si gni fic a nt savi ng i n I/ O a nd o ther c hips co mp ar ed to a c o nve ntio nal mi cr o pro ces sor bas ed c irc ui t. More e xa c t re pla ce me nt fo r R O M de vic es c a n be o b tai ne d i n the fo r m o f v aria nts w i th 39。 pi ggy ba c k39。 EP R O M(Er asa ble pro gr a mma b le R O M )s oc ke ts or d evi ces w i th E P RO M i ns tea d o f R O M 。 T he se de vic es ar e na turall y mo r e e xpe nsi ve tha n eq uiva le nt R O M de vic e, b ut d o pro vi de c o mpl e te circ ui t eq uiv ale nts . E P R O M b ase d de vic es ar e als o e xtre me l y a ttrac ti ve for l ow v ol ume ap plic a tio ns w her e the y pro vi de the a dv a nta ge s o f a si ngle c hi p de vic e, i n ter ms o f o n c hip I/ O , e tc . , w i th the c o nv e ni e nc e o f fl e xi b le us e r p r o gr a mma b i lity. Random access memory (RAM). R A M is for the s tora ge o f w or ki ng vari able s a nd d a ta us ed d uri ng p ro gra m e xec utio n. T he si ze o f thi s me mo r y varie s w i th d evi ce typ e b ut i t has the sa me c har ac teris ti c w i d th (4 ,8 ,1 6 bi ts e tc.) as the p ro cess or , Sp eci al func tio n re gis te rs, s uc h as s ta c k poi nter o r ti me r r e gis ter ar e o fte n lo gic all y i ncor po ra te d i nto the R A M a rea . It is als o c o mmo n i n Ha rar d type micr oc o mp uter s to tre a t the R A M ar ea as a c olle c tio n o f r e gis ter 。 i t is unne ces sar y to ma ke dis ti nc ti o n b e tw ee n R A M a nd pr oce ssor re gis ter as is do ne i n the ca se o f a mi c ro pro ces sor s ys te m si nce R A M a nd r e gis ters ar e no t us uall y p hys i c a l ly s e p a ra ted i n a mi c r o c o mp ute r . Central processing unit (CPU). T he CP U is muc h li ke tha t o f a ny mi cro pro ces so r. Ma ny ap plic a tio ns o f mi cro co mp ute rs a nd micr oc o ntr oller s i nv olv e the ha ndli ng o f b i na r y co ded de ci mal ( B C D) d a ta ( for nume ri cal disp la ys, for e xa mp le) , he nce i t is co mmo n to fi nd tha t the CP U i s w ell ad ap ted to ha nd li ng this type o f da ta . It i s also c o m mo n to fi nd go od facili ti es fo r tes ti ng, se tti ng a nd re se tti ng i ndivi d ual bi ts o f me mo r y or I/ O si nc e ma ny co ntr oller ap plic a tio ns i nv olv e the tur ni ng o n a nd o ff o f si ngl e o utp ut li ne s or the re adi ng the si ngle l i ne . T hese li ne s a re r eadi l y i nter fa ce d to twos ta te de vic es s uc h as sw i tc hes , ther mo s ta ts , s o l i d state r e l ays , v a l v e s, mo to r, e tc . Parallel input/output. P ar allel i np ut a nd o utp ut sc he me s var y s o mew ha t i n di ffere nt mi c roc o mp ute r 。 i n mo s t a mec ha nis m is pr ovi de d to a t l eas t all ow s o me fle xibili ty o f c ho osi ng w hic h pi ns ar e o utp uts a nd w hic h a re i np uts. T hi s ma y a p pl y to all or s o me o f the p or ts . S o me I/ O li nes a re s ui ta ble for dire c t i nter fa ci ng to, for e xa mpl e, fl uor esc e nt di spl a ys , o r ca n pr ovi de s uffici e nt c urre nt to ma ke i nte r faci ng o the r c o mp o ne nts s tr ai ghtfo rw ar d. S o me de vic es allow a n I/ O po r t to be c o nfi gure d a s a s ys te m b us to allow o ff c hi p me mo r y a nd I/ O e xp a nsio n. T his facil i ty is po te nti all y use ful a s a p ro d uc t r a nge d ev elo ps , si nce s ucce ssiv e e nha nc e me nts ma y be co me to o bi g for on c hi p me mo r y a nd i t