【正文】 ? State Diagram and Transition Table for Protocol 3 State: (Sending Window, Receiving Window, Channel) * * * * Ch. 3 Data Link Layer 46 Finite State Machine (3) ? State Diagram and Transition Table for Protocol 3 (Full Duplex) Ch. 3 Data Link Layer 47 Petri Net Models (1) ? Four basic elements – Place (地方 ): shown as circle, . states – Transition (轉(zhuǎn)態(tài) ): shown as horizontal or vertical bars – Arc (箭頭 ): representing input and output states (places) of a transition – Token (記號 ): shown as heavy dot, . current state (place) ? fire (轉(zhuǎn)態(tài)發(fā)射 ) – If all the input places have tokens, then the transition is enabled。 all the output places are added with tokens. ? Simulation (模擬 ) – To run a puter program to emulate all the possible occurrences of events and transitions (firings) to verify the feasibility of the protocol Ch. 3 Data Link Layer 48 Petri Net Models (2) ? Petri Net for Protocol 3 ? Algebraic Expression for transition: (1) Transition 10: (Receive 0) CG ? DF (2) Transition 3: (Receive 1) DA ? BE (3) Transition 11: (Receive 1) EF ? DG (4) Transition 1: BD ? AC (Receive 0) ? ? Easier to program Ch. 3 Data Link Layer 49 Example Data Link Protocols ? HDLC – Highlevel Data Link Control ? The Data Link Layer in the Inter ? The Data Link Layer in ATM Ch. 3 Data Link Layer 50 HDLC (1) ? Highlevel Data Link Control – IBM SNA: SDLC (Synchronous DLC) – ANSI ADCCP (Advanced Data Communication Control procedure) – ISO HDLC – CCITT LAP (Link Access Procedure) (in ) ? LAPB ? BitOriented ? Frame format Ch. 3 Data Link Layer 51 HDLC (2) ? Three kinds of frames – (a) Information (資訊 ) – (b) Supervisory (主控 ) – (c) Unnumbered (未編號 ) ? Seq: Sequence Number ? Next: Piggybacking ACK ? P/F: Poll/Final ? Computer ? Terminal Poll = 1 (polling terminal to transmit) ? Computer ? Terminal Final = 0 (Data except the last) Final = 1 (The last data) Ch. 3 Data Link Layer 52 HDLC (3) ? Type – 0: RECEIVE READY (Nonpiggybacking ACK) – 1: REJECT (. GoBackN) – 2: RECEIVE NOT READY (Nonpiggybacking ACK, suspend sending) – 3: SELECTIVE REJECT (. Selective Repeat) ? UNNUMBERED Frame – Goal: Control frames | data frames for unreliable connectionless service – Commands: 187。 SNRM (Set Normal Response Mode): Connecting – Master/Slave 187。 FRMR (FRaMe Reject): Informing semantic error of control frame 187。 UI (Unnumbered Information): Information contained in control frames, passed to data link layer Ch. 3 Data Link Layer 53 The Data Link Layer in the Inter (1) ? Pointtopoint munication is primarily used in two situations – (1) Between routers in different LANs (via leased lines) – (2) Between home PCs and dialup system (via modems and telephone lines) 電話網(wǎng)路 LAN LAN LAN LAN SLIP/PPP PPP Ch. 3 Data Link Layer 54 The Data Link Layer in the Inter (2) ? PointtoPoint Data Link Protocols – SLIP (Serial Line Inter Protocol) – PPP (PointtoPoint Protocol) SLIP PPP Old New No error detection Error Detection Support IP only Multiple protocols supported Manual assigning IP address Automatic assigning IP address Authentication not supported Authentication supported Not a formal standard。 phasein (Windows 95/98/NT/2022 default) Used in dialup lines only Used in both dialup lines and leased lines between routers Ch. 3 Data Link Layer 55 The Data Link Layer in ATM (1) ? Sublayers of the Physical layer in ATM – PMD (Physical Medium Dependent，實體媒介相依 ) 187。Corresponding to OSI Data Link Layer ▲ ▼ Ch. 3 Data Link Layer 56 The Data Link Layer in ATM (2) ?Cell (細(xì)胞 ) 53 Bytes ?5: Header ?48: Payload (酬載 ) ?Header –VPI (Virtual Path Identification) –VCI (Virtual Circuit Identification) ?Interface –UNI (UserNetwork Interface) –NNI (NetworkNetwork Interface) ? UNI NNI (Payload) Ch. 3 Data Link Layer 57 The Data Link Layer in ATM (3) ? VP (虛擬路徑 ) / VC (虛擬線路 ) ? VPI (虛擬路徑識別 ) / VCI (虛擬線路識別 ) (虛擬路徑 ) (虛擬線路 ) (傳輸路徑 ) Ch. 3 Data Link Layer 58 The Data Link Layer in ATM (4) ? HEC (Header Error Control) – The checksum only covers the first four header bytes, not the payload field – Why: 187。 No need to check the whole cell. 187。 Divide the first 32 header bits by x8+x2+x+1 187。 The bit stream enter a 40bit shift register 187。 If no error, the buffer contains a valid cell 187。 The process is repeated until a valid HEC is located