【正文】 up, we can see that the actual operation to find a few, and sometimes have to turn a corner, and even turn some bends, this process is known as addressable, MCS51 a total of seven kinds of addressing, are presented below: First, immediately addressing: operand writing in the directive on, and on the procedures with opcode in memory. Put is placed immediately in front of a few to express the way for addressing the immediate addressing, such as 20H. Second, register addressing: operand on the register, in the directive to register the name directly to express operand address. For example, MOV A, R0 to belong to register addressing, the contents of register R0 is about to accumulator A Medium. Third, directly addressing: operand MCU internal RAM on a unit, in the instruction directly write the address of the module. Precedent such as the ADD A, 70H in 70H. Four, register indirect addressing: operand RAM on a particular unit, the unit39。s score into the various memory units, may be take n at this time directly addressing, a program for each student to use, not easier. Therefore, addressing the more programming more convenient and flexible, the scope of application of the more broad, addressing like to find people, such as people have been looking for cell phone, BP machine, landline phone, etc. Contacts are easy to find on He, singlechip microputer is also the case, addressing the more operands to find more convenient, singlechip functions of the stronger. In front of 51 family MCU introduce addressable manner, often encounter a number of internal singlechip registers, accumulator A, generalpurpose registers R0 ~ R7, data pointer DPTR and the memory and so on. Introduction at a later instruction, the data is necessary in these registers, memory between the transmission, or conduct operations. Therefore, the establishment of procedures would need to be familiar with the internal structure of SCM. 8051 within the overall structure of its basic characteristics: 8bit CPU, chip oscillator. 4k byte ROM, 128 bytes RAM, 21 special function registers, 32 I / O lines addressable 64k bytes external data, the program storage space, two 16bit timers, counters, interrupt structure: with Priority 2, the five interrupt sources .A full dualport serial addressing (you can search the contents of a) function, suitable for logic operations carried out by the bit processor. In addition to 128byte RAM, 4k byte ROM and interruption, serial port and timer modules, there are 4 group I / O port P0 ~ P3, the remaining ponent is the CPU all. Put 4kROM for 8751 for the EPROM is the structure, such as removal of ROM / EPROM part of the diagram is 8031, if the ROM replacement for Flash memory or EEPROM, or resave some I / O, you get 51 series derived species, such as 89C51, AT89C2051 MCU block diagram, etc.. Single chip are all parts of the bus through an internal anically linking. AT89C51 singlechip performance talk about the following introduction. AT89C51 is a flicker with 4K byte erasable programmable readonly memory (FPEROMFalsh Programmable and Erasable Read Only Memory) of lowvoltage, highperformance CMOS8 bit microprocessor, monly known as singlechip microputer. The device ATMEL manufacture highdensity nonvolatile memory technology with industrystandard MCS51 Instruction set and output pin patible. Because of the multipurpose 8bit CPU and flash memory chips in a single portfolio, ATMEL The AT89C51 is a highperformance microcontrollers, for a lot of embedded control system provides a flexible and inexpensive program. Main features: with the MCS51 patible, 4K bytes Programmable Flash Memory, Life expectancy: 1000 Writing / wipe cycle .. data retention time: 10 years. wholly static job: 0Hz24Hz. Threetier program memory lock. 128 * 8bit internal RAM. 32 programmable I / O line. Two 16bit timer / counter interrupt sources .5. Programmable serial channel. Lowpower idle and powerdown mode.?chip oscillator and clock circuitry. Pin Description: VCC: power supply voltage. GND: Ground. P0 port: P0 mouth for a grade 8 opendrain bidirectional I / O port, each pin can absorb current 8TTL door. P1 pin when I first Writing 1, is defined as the high impedance input. P0 can be used for external program data memory, which can be defined as data / address bit eight. At FIASH programming, P0 port input as the original code, when FIASH to check when, P0 output of the original code, this time outside P0 must be pushed. P1 port: P1 port are provided on an internal pullup resistor of 8 bidirectional I / O port, P1 mouth to receive the output buffer current 4TTL door. P1 pin I write one, she was an internal pullhigh, can be used as input, P1 I was an external pulldown low when the output current, which is up because of internal reasons la. FLASH programming and calibration at the time, P1 mouth as eightbit address to receive. P2 port: P2 mouth to an internal pullup resistor on the 8bit bidirectional I / O port, P2 I can receive buffers, the output current of 4 TTL door, when I was P2 Writing 1, the pin was on the internal push pullup resistor, and as an input. And therefore as a type, P2 pin I was driving down the outside to output current. This is up because of internal reasons la. P2 mouth when used in external program memory or 16bit address of the external data memory access time, P2 port output address high eight. Give the address at 1, it is the use of internal pulladvantage, when eight addresses on the external data memory read and write when, P2 I output the contents of special function registers. P2 mouth at FLASH programming and calibration receive high eight address signals and control signals. P3 mouth: P3 mouth are 8pin with internal pullup resistor on the bidirectional I / O port to receive the output current o