【正文】 1）鎖相環(huán)中的鑒相器通常由模擬乘法器組成，利用模擬乘法器組成的鑒相器電路如圖 ： U i（ t）U o U 圖 乘法器 2）低通濾波器如圖 ： 用低通濾波器 LF 將和頻分量濾掉，剩下的差頻分量作為壓控振蕩器的輸入控制電壓 uC（ t）。該特性的表達式為 0( ) ( )u o ct K u t???? （ 31） 圖 壓控特性 上式說明當 uc（ t） 隨時間而變時，壓控振蕩器的振蕩頻率 ω u也隨時間而變，鎖相環(huán)進入 “ 頻率牽引 ” ，自動跟蹤捕捉輸入信號的頻率，使鎖相環(huán)進入鎖定的狀態(tài)，并保持 ω 0=ω i的狀態(tài)不變。引腳功能如下。 2FSK 基于 Multisim仿真的解調電路的整體電路設計圖如圖 所示： 蘭州理工大學畢業(yè)設計 16 圖 2FSK的 Multisim的解調仿真電路 圖 2FSK的 Multisim解調電路的仿真 蘭州理工大學畢業(yè)設計 17 2PSK 調制解調電路設計 2PSK 調制解調電路設計原理 PSK 分為二進制相位鍵控（ 2PSK）和多進制相位鍵控（ MPSK）。 在二進制數(shù)字調制中 ,當正弦載波的相位隨二進制數(shù)字基帶信號離散變化時 ,則產(chǎn)生二進制移相鍵控 (2PSK)信號 。 和 180176。 二進制移相鍵控信號的調制原理圖如 下 所示 。 碼 型 變換乘 法 器()st2 ()p s ketc o s c t?雙 極 性不 歸 零 圖 模擬調頻法 2 ()p s ketc o sc t?0?0180移 相 ()st開 關 電 路 圖 鍵控法 2PSK 信號的解調通常都是采用相干解調 , 該文的 解調器原理圖如圖 與2FSK 解調原理相同 。 2PSK 基于 multisim仿真的調制解調電路的整體電路設計圖如圖 ： 圖 2PSK調制解調電路圖 2PSK 調制仿真圖與解調后的 仿真圖如圖 。在該電路中載波信號和二進制數(shù)字信號同時輸入到相乘器中完成調制。 乘 法 器()stc o s c t?2 ()a s ketc o s c t?()st開 關 電 路2()A S Ket 圖 模擬相乘法 圖 數(shù)字鍵控法 蘭州理工大學畢業(yè)設計 20 2ASK/OOK 信號有兩種基本的解調方法：非相干解調（包絡檢波法）和相干解調（同步檢測法），相應的接收系統(tǒng)如圖 、圖 。該文的2ASK 解調原理框圖 ： 壓 控 振 蕩 器抽 樣 判 決模 擬 乘 法 器 低 通 濾 波 器調 制 信 號基 帶 信 號定 時 脈 沖 圖 2ASK 解調原理框圖 2ASK 調制與解調電路的設計與仿真 2ASK 調制 電路采用鍵控法調制，而解調電路的設計是采用鎖相環(huán)進行解調， 2ASK信號通過鎖相環(huán)最終解調出數(shù)字基帶信號。鎖相環(huán)鑒頻電路環(huán)路輸入頻率跟隨輸出頻率變化，即跟蹤，實現(xiàn)環(huán)路鎖定 困難，會出現(xiàn)毛刺。 在解調設計選取參數(shù)時，發(fā)現(xiàn)低通濾波器 中 C2 的值最影響波形的輸出，以 2FSK解調為例，一開始我在 C2 設為 10nF，出來的波形如下圖 ： 圖 C2=10nF 時的波形 可見解調出來的基帶信號出現(xiàn)嚴重失真。在對 2ASK、 2FSK、 2PSK 解調時，低通濾波器輸出的波形失真比較大，不過最后經(jīng)過抽樣判決電路整形后可以再生數(shù)字基帶脈沖。我首先查閱了大量的書本資料，接著又上網(wǎng)搜集了許多有用信息，有時候為了找到一個合適的電路而苦惱，有時候又為取得一點成功而由衷的高興。 在此次 畢業(yè) 設計中，我充分體會到了熟練運用相關軟件的重要性，不像 以前做的 課程設計，并沒有多少工作在計算機里實現(xiàn)的，就僅僅畫出了電路圖之后用元器件在面包板上搭電路就行了。 通過 畢業(yè) 設計，我增強了對通信電子技術的理解 ，學會查尋資料﹑比較方案，學會通信電路的設計﹑計算；進一步提高分析解決實際問題的能力，創(chuàng)造一個動腦動手﹑獨立開展電路實驗的機會，鍛煉分析﹑解決通信電子電路問題的實際本領，真正實現(xiàn)由課本知識向實際能力的轉化；通過典型電路的設計與仿真加深對基本原理的了解，增強了實踐能力。m, limiting the maximum gate voltage to V. Some consider this technology outdated, from a pure digital designer’s point of view, but it is at the forefront for the automotive, industrial and medical markets. 蘭州理工大學畢業(yè)設計 27 This list of optional features that enables the design of real SoCs includes high voltage interfacing up to 80 V, microprocessing capabilities up to 32 bits, wireless capabilities up to GHz, and dense logic design up to 15 K gates/mm2. Beside these capabilities, NVM integration is possible: E2PROM up to 4 Kbytes, Flash memory up to half a megabit or OnTimeProgrammable (OTP) cells for application calibrations. The ability to integrate all these features on a chip gives the customer the possibility to be independent from the obsolescence of the standalone NVM market, which is more or less driven by the puter market. This advantage is quite relevant when we consider the cost of requalifying a module for the OEMs in automotive, for instance. It also makes sense when considering the long lifespan of the applications embedded into cars, the industrial environment or medical selftreatment devices where patient cost is an important consideration. Nevertheless bridging the gap from digital to analog on a single chip does not occur without issues. Clocking noise from highspeed digital circuits, for instance, often interferes with noisesensitive analog functions. In addition, switching currents from highpower analog functions can interfere with lowvoltage digital processors. The goal is to protect lowvoltage transistors from the electric field effects of voltages that are 10 to 30 times higher. These important issues are not without solutions. For example, one of the latest releases in the I3T family, the I3T50 DTI, uses a deep trench isolation technique. This technique uses a series of isolating trenches that bury deep into the IC substrate。m I3T are able to manage the integration at a reasonable cost. A typical application diagram of a real mixedsignal SoC is shown in Figure . Basically, the chip integrates the system functionality from the sensor to the actuator, going through some digital processing. Conventional mixedsignal technology allows analog control and signal processing functions such as amplifiers, analogtodigital converters (ADCs) and filters to be bined with digital functionality such as microcontrollers, memory, timers and logic control functions on a single, customized chip. All signals that process an algorithm or arithmetic calculation are digital, so conversion of analog to digital signals is mandatory when submitting data for parison or processing by via a microcontroller, while conversion from digital output signals to analog highvoltage signals is required to drive an actuator or a load. The most recent mixedsignal technology AMIS developed, significantly simplifies the implementation of such driver functionality by allowing much higher voltage functionality to be integrated into an IC alongside the relatively low voltages required for conventional mixedsignal functions. This highvoltage mixedsignal technology is particularly relevant to automotive electronics applications where higher voltage outputs — to drive a motor or actuate a relay — need to be bined with analog signal conditioning functions and plex digital processing. A growing trend in mixedsignal circuit design is to add some type of central processing circuit to the analog circuits. For many applications the suitable choice of processing intelligence is an 8bit microcontroller core such as an 8051 or 6502. 8 bits remains the most popular choice as this type of SoC is not intended to replace plex highend central microcontrollers but more decentralized or slave applications such as sensor conditioning circuitry with local (as close to the sensor as possible) simple intelligence to control relays or motors. An automotive