【正文】
than the temperature of saturated water in the steam generator, so that , when feed water entering, it will absorb a lot of extra heat, the vapor phase bubble contents will reduce, resulting in water level decreasing。 the bubble volume on the liquid surface increases, causing the water level increased. Comprehensive two factors, after the step increase of the steam flow rate, the water level down has a time delay process, showing a up then down. The impact on the water level of water flow or steam flow stepping decreased has similar principle as above. As analysis can be seen as above, when the water flow or steam load change, the water level did not follow the change immediately, but there is an opposite process at first. This phenomenon is called false water level phenomenon. III. DESIGN OF WATER LEVEL FUZZY CONTROLLER The conventional PID controller has a poor control performance to the steam generator that exist“ false water level” characteristics, showing a greater overshoot in the tracking time. But a welldesigned fuzzy controller is able to overe the false water level phenomenon, and has good control performance. A. Sstructure of Fuzzy Controller The structure showed in Figure 1. Choose the water level error (e) and change rate of error (ec) as input of the fuzzy controller, the output of the fuzzy controller is the added value of the valve opening signal Δu. Meanwhile, use the steam flow feedforward to overe the false water level phenomenon, use water flow feedback to overe fluctuations in water supply side . k1, k2 were water flow and steam flow transmitter conversion factor. To ensure the water flow to match the steam flow, k1 and k2 values should be equal to. B. Fuzzy theory, fuzzy subset and Membership Function The fuzzy Analects of e, ec and u are [6, 6], both with seven fuzzy sets NB (negative big), NM (negative middle), NS (negative small), ZO (zero), PS (positive small), PM (positive middle) and PB (positive big) to describe. e, ec and, Δu are all using triangular membership function (see Figure 2) Figure 2. Input and out