各種視頻插頭插座接口介紹(引腳定義)-文庫吧資料
2025-06-22 07:37本頁面
【正文】 ) 19 DDC_DAT DDC2B Data 20 DDC_CLK DDC2B Clock TMDSTM: Transition Minimized Differential SignalingDDC: Display Data ChannelDDC2B: Simplest of the DDC modes defined in the VESA DDC standard此主題相關(guān)圖片如下：VESA Pamp。 sync: +/300 mV *1, 75 ohms) 2 Y_GND 3 PB (+/ 350 mV, 75 ohms) 4 PB_GND 5 PR (+/ 350 mV, 75 ohms) 6 PR_GND 7 Reserved line 1 8 Line 1 (0V: 525 lines, : 750 lines, 5V: 1125 lines) 9 Line 2 (0V: / 60i, : , 5V: / 60p) 10 Reserved line 2 11 Line 3 (0V: 4:3, : 4:3 letter box, 5V: 16:9) 12 Plug insert detect GND 13 Reserved line 3 14 Plug insert detect (output: 10K ohms, input: 100K ohms) hooks Shell GND *1: B signal to half tone level, L: , H: , 75 ohms) 12 13 Red signal ground 13 14 Ground 14 15 Red signal I/O ( Vpp, 75 ohms) 15 16 Ys input (switch for R, G amp。EIAJ RGB plug amp。 Europ233。各種視頻插頭插座接口介紹(引腳定義)SCART plug amp。 connector: CENELEC (Comit233。en de Normalisation Electrotechnique) EN 50 0491 / IEC 9331Pin No. Signal Inter Connection Pin No.1 Audio right channel output ( Vrms, 1K ohms) 2 2 Audio right channel input ( Vrms, 10K ohms) 1 3 Audio left channel output ( Vrms, 1K ohms) 6 4 Audio ground 4 5 Blue signal ground 5 6 Audio left channel input ( Vrms, 10K ohms) 3 7 Blue signal I/O ( Vpp, 75 ohms) 7 8 Fun
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鄂ICP備17016276號-1