【正文】 The PWM module also has the following features:? Two PWM signal outputs with plementary or independent operation? Hardware deadtime generators for plementary mode? Duty cycle updates are configurable to be immediated or synchronized to the PWM Architecture of PWM ModuleDetails of the architecturePMW generatorThe architecture of the 2output PWM generator shown in is based on a 16bit resolution counter which creates a pulsewidth modulated signal. The system is synthesized by a system clock signal whose frequency can be divided by 4 times or 12 times through setting the value of T3M for PWM0 or T4M for PWM1 in the special register PWMCON as shown in . To PWM0 generator, the clock to 16bit counter will be predivided by 4 times by default when T3M is set to zero. And the clock will be divided by 12 times when T3M is set to 1. This is also true for PWM1. The other bits in PWMCON are explained in detail in Table 1. Fig .4 Bit Mapping of PWMCONTable 1: The Bit Definition in PWMCONChannelselect logicThe follow Fig. 5 shows the channelselect logic which is useful in Complementary Mode. From this diagram, it is clear to know that signal CP and CPWM control the source of PWMH and PWML. And the details about the two control signals will be discussed in the section 3, and the architecture of deadtime generator will also be discussed in section 5 for the continuity of Complementary Mode.Fig. 5 Diagram of Channelselect LogicOperation Mode and Simulation ResultsThe design has two operation modes: Independent Mode and Complimentary Mode. By setting the corresponding bit CPWM in register PWMCON shown in user can select one of the two operation modes. When CPWM is set to zero, PWM module will work in Independent Mode, whereas, PWM module will work in Complimentary Mode. In the following of this section, the two operation mode will be explained respectively in detail and the simulation results of the PWM module from the Synoposys VCS EDA platform which verify the design will also be shown.Independent PWM Output ModeAn Independent PWM Output mode is useful for driving loads such as the one shown in Figure 6. A particular PWM output is in the Independent Output mode when the corresponding CP bit in the PWMCON register is set to this case, twochannel PWM outputs are independent of each other. The signal on pin PWM0/PWMH is from PWM0 generator, and the signal on pin PWM1/PWML is from PWM0 generator. The separate case is achieved by the channelselect logic shown in Fig. 6. The PWM I/O pins are set to independent mode by default upon advice reset. The deadtime generator is disabled in the Independent mode. The simulation result is shown in Figure 6 as the following Tr4 and tr3 are run bits to PWM0 and PWM1, respectively. Actually, from this diagram, Pin P1[5]/ P1[4] of MCU is used for PWMH/ PWML or normal I/O ,alternatively.Fig6 the Waveform of PWM Outputs in Independent ModeComplementary PWM Output ModeThe Complementary Output mode is used to drive inverter loads similar to the one shown in Figure 7. This inverter topology is typical for DC applications. In Complementary Output Mode, the pair of PWM outputs cannot be active simultaneously. The PWM channel and output pin pair are internally configured through channelselect logic as shown in Figure7. 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TQM Journal. 2008 翻譯部分英文原文Design of PWM Controller in a MCS51 Compatible MCUAuthor . YueLi Hu, Wei Wang Microelectronic Research amp。參考文獻(xiàn)[1] 謝自美．電子線路設(shè)計(jì)電源設(shè)計(jì)模塊和PWM應(yīng)用模塊并沒有在本文中得到詳細(xì)的說明，對(duì)單片機(jī)輸出PWM波形的研究不夠深入。通過這次畢業(yè)設(shè)計(jì)使我明白了自己原來知識(shí)還比較欠缺，明白學(xué)習(xí)是一個(gè)長期積累的過程，在以后的工作、生活中都應(yīng)該不斷的學(xué)習(xí)，努力提高自己知識(shí)和綜合素質(zhì)。在沒有做畢業(yè)設(shè)計(jì)以前覺得畢業(yè)設(shè)計(jì)只是對(duì)這幾年來所學(xué)知識(shí)的單純總結(jié)，但是通過這次做畢業(yè)設(shè)計(jì)發(fā)現(xiàn)自己的看法有點(diǎn)太片面。在這段時(shí)間不當(dāng)實(shí)現(xiàn)了入門軟件與硬件的常用設(shè)計(jì)與功能，還掌握了一項(xiàng)設(shè)計(jì)研究的制作過程所需要的詳細(xì)步驟和具體的實(shí)現(xiàn)方法的力度。并通過編寫程序?qū)崿F(xiàn)單片機(jī)輸出PWM軟件設(shè)計(jì)，包括模式選擇、時(shí)間選擇、顯示、按鍵程序等。PWM輸出波形占空比59%不變，令n=50,p=30,則輸出周期為25毫秒，占空比為59%的PWM波形仿真圖形如下所示，此時(shí)一二兩位顯示PWM波形周期為25ms，三四兩位顯示占空比為59%，PWM波形輸出為12秒。先保持換向開關(guān)和按鍵K1不變，即n值不變，按動(dòng)按鍵K2改變P值，令P=12，則PWM對(duì)應(yīng)的周期保持不變，占空比由原來的50%變?yōu)楝F(xiàn)在的59%，仿真圖形如下所示，此時(shí)一二兩位顯示PWM波形周期為10ms，三四兩位顯示占空比為59%，PWM波形輸出時(shí)間為37秒。20=50%，如下圖所示，一二兩位顯示PWM波形周期為10ms，三四兩位顯示占空比為50%，此時(shí)PWM的輸出波形已經(jīng)有了59秒鐘。，PWM為高電平時(shí)則LED點(diǎn)亮，PWM為低電平時(shí)則LED熄滅。它具有設(shè)計(jì)靈活，結(jié)果、過程的統(tǒng)一的特點(diǎn)，可使設(shè)計(jì)時(shí)間大為縮短、耗資大為減少，也可降低工程制造的風(fēng)險(xiǎn)。 在PROTUES繪制好原理圖后，可以在Keil uVision中輸入控制單片機(jī)運(yùn)行的代碼，對(duì)輸入的代碼進(jìn)行編譯生成*.HEX文件。軟件調(diào)試較易進(jìn)行，但硬件電路調(diào)試和系統(tǒng)調(diào)試必須在電路板制作完成，待元器件焊接完成后進(jìn)行。 Keil uVision軟件提供豐富的庫函數(shù)和功能強(qiáng)大的集成開發(fā)調(diào)試工具，全Windows界面，更易用戶的使用。 ，C語言在功能上、結(jié)構(gòu)性、可讀性、可維護(hù)性上有明顯的優(yōu)勢(shì)，因而易學(xué)易用。Keil uVision軟件的優(yōu)點(diǎn)1. Keil uVision生成的目標(biāo)代碼效率非常之高，多數(shù)語句生成的匯編代碼很緊湊，容易理解。 uVision軟件Keil uVision是美國Keil Software公司出品的51系列兼容單片機(jī)C語言軟件開發(fā)系統(tǒng)。 Protues提供了比較豐富的測試信號(hào)用于電路的測試。這些虛擬儀器儀表具有理想的參數(shù)指標(biāo)，例如極高的輸入阻抗、極低的輸出阻抗。理論上同一種儀器可以在一個(gè)電路中隨意的調(diào)用。Protues提供了豐富的資源，主要包括以下幾個(gè)方面：：仿真數(shù)字和模擬、交流和直流等數(shù)千種元器件，有30多個(gè)元件庫。由于PROTUES提供了實(shí)驗(yàn)室無法相比的大量的元器件庫，提供了修改電路設(shè)計(jì)的靈活性、提供了實(shí)驗(yàn)室在數(shù)量、質(zhì)量上難以相比的虛擬儀器、儀表，因而也提供了培養(yǎng)學(xué)生實(shí)踐精神、創(chuàng)造精神的平臺(tái)。是目前世界上唯一將電路仿真軟件、PCB設(shè)計(jì)軟件和虛擬模型仿真軟件三合一的設(shè)計(jì)平臺(tái)。它是目前最好的仿真單片機(jī)及外圍器件的工具。 Proteus軟件Protues軟件是英國Labcenter electronics公司出版的EDA工具軟件。因此，采用系統(tǒng)仿真是非常必要的。這樣就夠成了一個(gè)循環(huán)，T0監(jiān)視T1，T1監(jiān)視主程序，主程序又來監(jiān)視T0，從而保證系統(tǒng)的穩(wěn)定運(yùn)行。在這里T1的定時(shí)時(shí)間要設(shè)的大于主程序的運(yùn)行時(shí)間，給主程序留有一定的的余量。我們可以對(duì)T0設(shè)定一定的定時(shí)時(shí)間，當(dāng)產(chǎn)生定時(shí)中斷的時(shí)候?qū)σ粋€(gè)變量進(jìn)行賦值，而這個(gè)變量在主程序運(yùn)行的開始已經(jīng)有了一個(gè)初值，在這里我們要設(shè)