【正文】 C at clock speeds up to 25 MHz. They have a second full serial port built in, seven additional interrupts, a watchdog timer, a power fail reset, dual data pointers and variable speed peripheral access. In addition, the core is redesigned so that the machine cycle is shortened for most instructions, resulting in an effective processing ability that is roughly times greater (faster) than the standard 8052 device. None of these features, other than those inherent in the device operation, were utilized in order to maximize the similarity between the Dallas and Intel test codes. The CULPRiT technology device is a version of the MSC51 family patible C8052 HDL core licensed from the Ultra Low Power (ULP) process foundry. The CULPRiT technology C8052 device is designed to operate at a supply voltage of 500 mV and includes an onchip input/output signal levelshifting interface with conventional higher voltage parts. The CULPRiT C8052 device requires two separate supply voltages。t mistake, in order to extricate oneself from a predicament , need to be pressed and restored to the throne the key restarting too. It is an input end which is restored to the throne the signal in8052 China RST pin. Restore to the throne signal high level effective , should sustain 24 shake cycle (namely 2 machine cycles ) the above its effective times. If 6 of frequency of utilization brilliant to shake, restore to the throne signal duration should exceed 4 delicate to finish restoring to the throne and operating. Produce the logic picture of circuit which is restored to the throne the signal: Restore to the throne the circuit and include two parts outside in the chip entirely. Outside that circuit produce to restore to the throne signal (RST ) hand over to Schmitt39。 中文 6065 字 畢 業(yè) 設(shè) 計(jì)（ 譯 文） 題 目： 基于單片機(jī)和 TDA5767HN 的收音機(jī)系統(tǒng)設(shè)計(jì) 院 （系） ： 自動(dòng)化學(xué)院 專(zhuān) 業(yè)： 自動(dòng)化 班 級(jí)： 自動(dòng) 1002 班 學(xué)生姓名： 導(dǎo)師姓名： 職稱(chēng)： 教授 An overview of microcontroller Description The AT89C52 is a lowpower, highperformance CMOS 8bit microputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s highdensity nonvolatile memory technology and is patible with the industrystandard MCS51 instruction set and pinout. The onchip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with Flash on a monolithic chip, the Atmel AT89C52 is a powerful microputer which provides a highlyflexible and costeffective solution to many embedded control applications. Function characteristic The AT89C52 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16bit timer/counters, a five vector twolevel interrupt architecture, a full duplex serial port, onchip oscillator and clock circuitry. In addition, the AT89C52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Powerdown Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. Pin Description VCC： Supply voltage. GND： Ground. Port 0： Port 0 is an 8bit opendrain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance 0 may also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode P0 has internal 0 also receives the code bytes during Flash programming,and outputs the code bytes during programverification. External pullups are required during programverification. Port 1： Port 1 is an 8bit bidirectional I/O port with internal Port 1 output buffers can sink/source four TTL 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal 1 also receives the loworder address bytes during Flash programming and verification. Port 2： Port 2 is an 8bit bidirectional I/O port with internal Port 2 output buffers can sink/source four TTL 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of the internal 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses. In this application, it uses strong internal pullupswhen emitting 1s. During accesses to external data memory that use 8bit addresses, Port 2 emits the contents of the P2 Special Function 2 also receives the highorder address bits and some control signals during Flash programming and verification. Port 3： Port 3 is an 8bit bidirectional I/O port with internal Port 3 output buffers can sink/source four TTL 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the 3 also serves the functions of various special features of the AT89C52 as listed below: Port 3 also receives some control signals for Flash programming and verification. RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. A