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單片機(jī)89c52中英文對(duì)照翻譯(經(jīng)典版)(留存版)

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【正文】 下計(jì)數(shù)。如表3 所示,工作模式由T2CON中的相關(guān)位選擇。當(dāng)中斷拉高后,執(zhí)行中斷服務(wù)程序。除了復(fù)位(硬件復(fù)位或WDT溢出復(fù)位),沒有辦法停止WDT工作。程序存儲(chǔ)器:如果EA引腳接地,程序讀取只從外部存儲(chǔ)器開始。EA/VPP:訪問外部程序存儲(chǔ)器控制信號(hào)。在flash編程和校驗(yàn)時(shí),P3口也接收一些控制信號(hào)。P1 口:P1 口是一個(gè)具有內(nèi)部上拉電阻的8 位雙向I/O 口,p1 輸出緩沖器能驅(qū)動(dòng)4 個(gè)TTL 邏輯電平。 范文范例參考 AT89C52 internal structure analysisDescriptionThe AT89S52 is a lowpower, highperformance CMOS 8bit microcontroller with 8Kbytes of insystem programmable Flash memory. The device is manufactured using Atmel’s highdensity nonvolatile memory technology and is patible with the industrystandard 80C51 instruction set and pinout. The onchip Flash allows the programmemory to be reprogrammed insystem or by a conventional nonvolatile memory programmer. By bining a versatile 8bit CPU with insystem programmable Flash ona monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highlyflexible and costeffective solution to many embedded control applications. The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16bit timer/counters, a sixvector twolevel interrupt architecture, a full duplex serial port, onchip oscillator,and clock circuitry. In addition, the AT89S52 is designed with static logic for operationdown to zero frequency and supports two software selectable power saving Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, andinterrupt system to continue functioning. The Powerdown mode saves the RAM contentsbut freezes the oscillator, disabling all other chip functions until the next interruptor hardware reset.Pin DescriptionVCCSupply voltage.GNDGround.Port 0Port 0 is an 8bit open drain bidirectional I/O port. As anoutput port, each pin can sink eight TTL inputs. When 1sare written to port 0 pins, the pins can be used as 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, P0 has internal 0 also receives the code bytes during Flash programming and outputs the code bytes during program pullups are required during program verification.Port 1Port 1 is an 8bit bidirectional I/O port with internal Port 1 output buffers can sink/source four TTL 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups. In addition, and can be configured to be the timer/counter 2 external count input () and the timer/counter 2 trigger input (), respectively, asshown in the following 1 also receives the loworder address bytes duringFlash programming and verification.Port 2Port 2 is an 8bit bidirectional I/O port with internal Port 2 output buffers can sink/source four TTL 1s are written to Port 2 pins, they are pulled high bythe internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will sourcecurrent (IIL) because of the internal 2 emits the highorder address byte during fetchesfrom external program memory and during accesses toexternal data memory that use 16bit addresses (MOVX DPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVX RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification.Port 3Port 3 is an 8bit bidirectional I/O port with internal Port 3 output buffers can sink/source four TTL 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the 3 also serves the functions of various special features of the AT89S52, as shown in the following 3 also receives some control signals for Flash programming and verification.RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 96
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