【正文】 ***************137 UART_DIV_CNT0 EQU 26138 UART_DIV_CNT1 EQU 0139140 InitUart141 ldr r0, =ULCON0142 ldr r1, =DATA8b :OR: STOPb1 :OR PARITY_NO143 str r1, [r0]144145 ldr r0, =UCON0146 ldr r1, =RX_STAT_INT|9147 str r1, [r0]148 149 ldr r0, =UBRDIV0150 ldr r1, =UART_DIV_CNT04|UART_DIV_CNT1151 str r1, [r0] 。0000006097 DCD amp。ce2983fd 5354 EXPORT RemapMemory55 RemapMemory56 adr r0, RemapMemPara57 ldmia r0, {r1r11}58 ldr r0, =ROMCON059 stmia r0, {r1r11}60 nop61 nop62 ldr r0, =IRQ_SVC_VECTOR63 ldr r1, =IRQ_SERVICE 。0x3f800001213 。. 定義系統(tǒng)異常向量表46 ResetEntry47 b SYS_RST_HANDLER48 b UDF_INS_HANDLER49 b SWI_SVC_HANDLER50 b INS_ABT_HANDLER51 b DAT_ABT_HANDLER52 b .53 b IRQ_SVC_HANDLER54 b FIQ_SVC_HANDLER行4654定義了系統(tǒng)異常處理向量表。***********************************************205206 END . 宏定義1 ModeMask EQU 0x1F2 SVC32Mode EQU 0x133 IRQ32Mode EQU 0x124 FIQ32Mode EQU 0x115 User32Mode EQU 0x106 Abort32Mode EQU 0x177 Undef32Mode EQU 0x1B8 IRQ_BIT EQU 0x809 FIQ_BIT EQU 0x4010 。**********************************************************17 。******************************************************31 AREA SelfBoot, CODE, READONLY3233 IMPORT UDF_INS_VECTOR34 IMPORT SWI_SVC_VECTOR35 IMPORT INS_ABT_VECTOR36 IMPORT DAT_ABT_VECTOR37 IMPORT IRQ_SVC_VECTOR38 IMPORT FIQ_SVC_VECTOR 3940 ENTRY 41 IF :DEF: |ads$version|42 ELSE43 EXPORT __main44 __main45 ENDIF 46 ResetEntry47 b SYS_RST_HANDLER48 b UDF_INS_HANDLER49 b SWI_SVC_HANDLER50 b INS_ABT_HANDLER51 b DAT_ABT_HANDLER52 b .53 b IRQ_SVC_HANDLER54 b FIQ_SVC_HANDLER5556 。RamEndAddr EQU amp。*******************************************************109 SYS_RST_HANDLER110 mrs r0, cpsr 。***********************************************171 IMPORT |Image$$RO$$Base| 。amp。1084206071 DCD amp。00000000100 DCD amp。read rx data155 156 ldr r0, =ULCON1157 ldr r1, =DATA8b :OR: STOPb1 :OR PARITY_NO158 str r1, [r0]159 160 ldr r0, =UCON1161 ldr r1, =RX_STAT_INT|9162 str r1, [r0]163 164 ldr r0, =UBRDIV1165 ldr r1, =UART_DIV_CNT04|UART_DIV_CNT1166 str r1, [r0] 。 str r1, [r0], 4215 。xxxxxa00269 SVCStack 256 。amp。行3437設(shè)置ROMCON0～REFEXTCON這11個(gè)寄存器，特別地，設(shè)置ROMCON0的起始地址為0x0，結(jié)束地址為0x2000001，DRAMCON0的起始位置位置0x1000000，結(jié)束0x20000001。行5659設(shè)置ROMCON0～REFEXTCON這11個(gè)寄存器，特別地，設(shè)置ROMCON0的起始地址為0x1000000，結(jié)束地址為0x20000001，DRAMCON0的起始位置位置0x0，結(jié)束0x10000001，從而實(shí)現(xiàn)了內(nèi)存重映射，程序從此在內(nèi)存中執(zhí)行。. 初始化18個(gè)外部I/O端口函數(shù)InitPort114 InitPort115 ldr r0, =IOPMOD116 ldr r1, =1117 str r1, [r0] 。行145147設(shè)置寄存器UCON0，設(shè)置串口的發(fā)送與接收模式。1214 。 ldr r0, =0x11000000 。read rx data155 156 ldr r0, =ULCON1157 ldr r1, =DATA8b :OR: STOPb1 :OR PARITY_NO158 str r1, [r0]159 160 ldr r0, =UCON1161 ldr r1, =RX_STAT_INT|9162 str r1, [r0]163 164 ldr r0, =UBRDIV1165 ldr r1, =UART_DIV_CNT04|UART_DIV_CNT1166 str r1, [r0] 。000083fd行81聲明了全局函數(shù)ResetMemSet。1004039877 DCD amp。1004039852 DCD amp。0x3f80000行8定義一段代碼text，該段將放入RO段。 .+8242 movne pc, r1 243 244 ldr r1, =pIrqHandler245 ldr r1, [r1]246 cmp r1, 0247 movne lr, pc248 movne pc, r1 249 250 ldr r1, =pIrqFinish251 ldr r1, [r1]252 cmp r1, 0253 movne lr, pc 。Cache Flush 211 。disable timer 0,1133134 mov pc, r14135136 。0000006096 DCD amp。1004039852 DCD amp。0x3ff000011 SRAM_BASE EQU 0x3f8 。行166執(zhí)行RemapMemory函數(shù)（），RemapMemory函數(shù)主要是設(shè)置ROMCON0、ROMCON1和DRAMCON0、DRAMCON1；并將IRQ_SERVICE函數(shù)的地址存入一個(gè)內(nèi)存中的數(shù)組中。. 定義新程序、引入新符號(hào)40 ENTRY 41 IF :DEF: |ads$version|42 ELSE43 EXPORT __main44 __main45 ENDIF 行40首先聲明了程序的入口根據(jù)[1]中第89頁(yè)的說(shuō)明，行4145判斷程序是給ADS還是SDT執(zhí)行的，如果是如果是SDT，則導(dǎo)出__main符號(hào)，并開始定義__main函數(shù)的開始。 a1 = r0194 mov r2, TIP_SIZE195 0 196 ldr r3, [r1], 4197 str r3, [r0], 4198 subs r2, r2, 1199 bne %B0200201 sub r0, r0, TIP_SIZE*4202 mov pc, r0 203204 。20013 GBLS MainEntry14 MainEntry SETS main15 IMPORT $MainEntry16 。******************************************************57 MACRO 58 $Label HANDLER $Vector59 $Label60 sub lr, lr, 4 61 stmfd sp!, {r0r3, lr} 62 ldr r0, =$Vector63 ldr pc, [r0]64 ldmfd sp!, {r0r3, pc}^ 65 MEND6667 UDF_INS_HANDLER68 stmfd sp!, {r0r3, lr}69 ldr r0, =UDF_INS_VECTOR70 mov lr, pc71 ldr pc, [r0]72 ldmfd sp!, {r0r3, pc}^73 SWI_SVC_HANDLER74 stmfd sp!, {r0r3, lr}75 ldr r0, =SWI_SVC_VECTOR76 mov lr, pc77 ldr pc, [r0]78 ldmfd sp!, {r0r3, pc}^79 INS_ABT_HANDLER80 sub lr, lr, 481 stmfd sp!, {r0r3, lr}82 ldr r0, =INS_ABT_VECTOR83 mov lr, pc84 ldr pc, [r0]85 ldmfd sp!, {r0r3, pc}^86 DAT_ABT_HANDLER87 sub lr, lr, 488 stmfd sp!, {r0r3, lr}89 ldr r0, =DAT_ABT_VECTOR90 mov lr, pc91 ldr pc, [r0]92 ldmfd sp!, {r0r3, pc}^93 IRQ_SVC_HANDLER94 sub l