【正文】 configured to be the multiplexed address/data bus during accesses to external program and data memory. In this mode P0 has internal Pullup resistor. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during Program verification. External Pullup resistors are required during Program verification. Port 1 Port 1 is an 8bit bidirectional I/O port with internal Pullup resistors. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal Pullup resistors and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal Pullup resistors. Port 1 also receives the loworder address bytes during Flash programming and verification. Port 2 Port 2 is an 8bit bidirectional I/O port with internal Pullup resistor. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal Pullup resistor and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current, because of the internal Pullup resistor. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that use 16bit addresses. In this application, it uses strong internal Pullup resistor when emitting 1s. During accesses to external data memory that use 8bit addresses, Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification. 2021屆電子信息科學(xué)與技術(shù)專業(yè)畢業(yè)設(shè)計(jì)掉電方式保存隨機(jī)存取數(shù)據(jù)存儲(chǔ)器中的內(nèi)容，但震蕩器停止工作并禁止其它所有部件的工作直到下一個(gè)復(fù)位。閃爍編程或校驗(yàn)時(shí)， P2 口接收高位地址和其它控制信號。欲使中央處理器僅訪問外部程序存儲(chǔ)器， EA 端必須保持低電平。這種情況下，外部時(shí)鐘脈沖接到 XTAL1 端，即內(nèi)部時(shí)鐘發(fā)生器的輸入端， XTAL2 則懸空。外文翻 譯 12 掉電模式 在掉電模式下，振蕩器停止工作，進(jìn)入掉電模式的指令是最后一條被執(zhí)行的指令，片內(nèi) RAM 和特殊功能寄存器的內(nèi)容在中指掉電模式前被凍結(jié)。程序會(huì)首先影響中斷，進(jìn)入中斷服務(wù)程序，執(zhí)行完中斷服務(wù)程序，并緊隨 RETI 指令后，下一條要執(zhí)行的指令就是使單片機(jī)進(jìn)入閑散工作模式，那條指令后面的一條指令。10PF，而如果使用陶瓷振蕩器建議選擇 40PF177。此外，這個(gè)引腳會(huì)微弱拉高，單片機(jī)執(zhí)行外部程序時(shí)，應(yīng)設(shè)置 ALE 無效。對端口寫 “1”，通過內(nèi)部的電阻把端口拉到高電平，此時(shí)，可作為輸入口。片內(nèi)含有 8 位中央處理器和閃爍存儲(chǔ)單元，有較強(qiáng)的功能的 AT89C51 單片機(jī)能夠被應(yīng)用到控制領(lǐng)域中。外文翻 譯 6 powerdown is a hardware reset. Reset redefines the SFRs but does not change the onchip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Program Memory Lock Bits On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed