【正文】 ............... 20 中文翻譯 ............................................................... 27 附錄Ⅱ程序源代碼 ........................................................... 31 附錄 III 電路仿真圖 ......................................................... 38 畢業(yè)設(shè)計(jì) 第 頁 1 第 1 章 緒 論 課題背景 隨著出 租車行業(yè)的發(fā)展， 出租車已經(jīng)是城市交通的重要組成部分，從加強(qiáng)行業(yè)管理以及減少司機(jī)與乘客的糾紛出發(fā)，具有良好性能的計(jì)價(jià)器對(duì)出租車司機(jī)和乘客來說都是很必要的。 其中主要的外圍功能電路有：驅(qū)動(dòng)電路，按鍵控制電路，掉電保護(hù)電路， 時(shí)鐘部分，數(shù)碼管顯示電路 等。 系統(tǒng)結(jié)構(gòu)圖如下： 系統(tǒng)結(jié)構(gòu)圖 通 過比較以上兩種方案，我們采用 方案二 實(shí)現(xiàn)出租車計(jì)價(jià) 器 的功能。模擬開關(guān)一端接在 口， 另一端接地，通過來回高低電平的變化，每按兩次，對(duì)應(yīng)的里程數(shù)加一。 AT89S51 單片機(jī)簡介 AT89S51 具有如下特點(diǎn)： 40 個(gè)引腳， 4k Bytes Flash 片內(nèi)程序存儲(chǔ)器， 128 bytes 的隨機(jī)存取數(shù)據(jù)存儲(chǔ)器（ RAM）， 32 個(gè)外部雙向輸入 /輸出（ I/O）口， 5 個(gè)中斷優(yōu)先級(jí) 2 層中斷嵌套， 2 個(gè) 16 位可編程定時(shí)計(jì)數(shù)器 ,2 個(gè)全雙工串行通信口，看門狗（ WDT）電路，片內(nèi)時(shí)鐘振蕩器。 VSS:接地。 P0口接數(shù)碼管段選端， P2口接驅(qū)動(dòng)芯片。 本設(shè)計(jì)用 74LS245 作為驅(qū)動(dòng)芯片，雙向總線發(fā)送器 /接收器 (3S)。 為了簡化硬件，通常將所有位的段碼線相應(yīng)段并聯(lián)在一起，由一個(gè) 8 位 I/O 口控制，在同一時(shí)刻，只讓一位選通，如此循環(huán)，就可以使各位顯示出將要顯示的字符。除了上電復(fù)位外 還需要按鍵手動(dòng)復(fù)位 （圖 ） 。 A1（引腳 2）：器件地址的 A1 位。其實(shí)只需在時(shí)鐘引腳連接上外圍的定時(shí)控制元件，就可以構(gòu)成一個(gè)穩(wěn)定的自激振蕩器。 另外為功能鍵，控制價(jià)格調(diào)整，這個(gè)按鍵是在沒有按下啟動(dòng) /停止按鍵時(shí)有作用，計(jì)價(jià)過程中無效。 本設(shè)計(jì)就是采用 C 語言編寫的，由于采用模塊化操作，使得程序在修改，執(zhí)行的時(shí)候顯得方便易行。 調(diào)試的一般過程如圖 所示： 圖 系統(tǒng)調(diào)試流程圖 系統(tǒng)調(diào)試的一般過程是上電運(yùn)行后觀察其運(yùn)行狀態(tài)，數(shù) 碼管是否點(diǎn)亮等。 ，進(jìn)行軟件仿真調(diào)試，直到出現(xiàn)正確的結(jié)果。 常用排阻 有 A 型和 B 型。 元件的焊接方法 手 工焊接是傳統(tǒng)的 的焊接方法， 雖然批量電子產(chǎn)品生產(chǎn)已較少采用手工焊接了 ，但 在電 子產(chǎn)品的維修、調(diào)試中不可避免地還會(huì)用到手 工焊接。若是要拆下印刷板上的元器件 ,則待烙鐵頭加熱后 ,用手或 鑷子輕輕拉動(dòng)元器件 ,看是否可以取下。 ③ 夾松香焊接 ,焊錫與元器件或印刷板之間夾雜著一層松香 ,造成電連接不良。當(dāng)少量松香殘留時(shí) ,可以用電烙鐵再輕輕加熱一下 ,讓松香揮發(fā)掉 ,也可以用蘸有無水酒精的棉球 ,擦去多余的松香或焊劑。焊接集成電路最好先焊接地端、輸出端、電源端 ,再焊輸入端。 硬件檢測 設(shè)計(jì)的過程中，對(duì)硬件的檢測和對(duì)軟件的測試都不能忽略，因?yàn)樵谙到y(tǒng)的仿真過程中。 元件在選購時(shí)需要 多備選元件 ，元件的型號(hào)較多， 產(chǎn)品質(zhì)量沒有可靠保證， 就避免不了我們買的元器件是損壞的，再加上焊接是在萬能板上焊接的。如果出現(xiàn)看不到 12MHZ 的正弦波形的現(xiàn)象，說明此部分電路不正常 。本次設(shè)計(jì)我學(xué)習(xí)到不少單片機(jī)的知識(shí)，但由于自己的理論知識(shí)水平有限，實(shí)踐知識(shí)和設(shè)計(jì)經(jīng)驗(yàn)不足，在設(shè)計(jì)過程中難免存在一些問題。 畢業(yè)設(shè)計(jì)培養(yǎng)了我們獨(dú)立思考問題 ，分析 問題與解決問題的能力，在設(shè)計(jì)中我明白了理論與實(shí)踐有很大的區(qū) 別，理論上可以實(shí)現(xiàn)的，但要做具體的實(shí)物，卻要多方面考慮。 for 42PDIP GND connects only the logic core and the embedded program memory). VDD： Supply voltage for the 42PDIP which connects only the logic core and the embedded program memory. PWRVDD： Supply voltage for the 42PDIP which connects only the I/O Pad Drivers. The application board MUST connect both VDD and PWRVDD to the board supply voltage. PWRGND： Ground for the 42PDIP which connects only the I/O Pad Drivers. PWRGND and GND are weakly connected through the mon silicon substrate, but not through 畢業(yè)設(shè)計(jì) 第 頁 22 any metal link. The application board MUST connect both GND and PWRGND to the board ground. Port 0： Port 0 is an 8bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs. Port 0 can also be configured to be the multiplexed loworder address/data bus during accesses to external program and data memory. In this mode, PO has internal pullups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pullups are required during program verification. Port 1： Port 1 is an 8bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (lip) because of the internal pullups. Port 2： Port 2 is an 8bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (lip) because of the internal pullups. Port 2 emits the highorder address byte during fetches from external program memory and during accesses to external data memory that uses 16bit addresses (MOVXDPTR). In this application, Port 2 uses strong internal pullups when emitting 1s. During accesses to external data memory that use 8bit addresses (MOVXRI), Port 2 emits the contents of the P2 Special Function Register. 畢業(yè)設(shè)計(jì) 第 頁 23 Port 2 also receives the highorder address bits and some control signals during Flash programming and verification. Port 3： Port 3 is an 8bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (lip) because of the pullups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S51， as shown in the following table. RST： Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled. ALE/PROG： Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise