【正文】 。 錯(cuò)誤顯示 — 當(dāng) PLC 有大的硬件或軟件錯(cuò)誤時(shí)，這將有顯示。因此，直到梯形圖的第二行被掃描時(shí) X 值才能與 A 相等。如圖 4 所示，梯形圖將按從左到右，從上到下的順序被解釋。 3． 1 輸入輸出掃描 輸入值被掃描到 PLC 時(shí)，自然輸入值被復(fù)制到存儲(chǔ)器。（例如：意外停止）有一些特殊的 PLC 功能，能直接讀取輸入值，避免了輸入表格。只用復(fù)制了輸入值的存儲(chǔ)器，梯形邏輯圖將被解決一個(gè)，這叫邏輯掃描。 輸出電路 — 圖形卡就像一個(gè)三相開(kāi)關(guān)輸出卡。）在進(jìn)入 CPU 之前，它穿過(guò)緩沖電路。一個(gè) VonNeaman 計(jì)算機(jī)一次只能執(zhí)行一個(gè)指令，他們是這樣運(yùn)行的，盡管許多計(jì)算機(jī)看上去一次在做許多事情。流程圖是一種圖表語(yǔ)言，用于在一個(gè)控制器或應(yīng)用軟件中描述順序操作，它用于建立有標(biāo)準(zhǔn)組件的可循環(huán)使用的運(yùn)行庫(kù)。標(biāo)準(zhǔn)數(shù)學(xué)和邏輯運(yùn)行可以與用戶交流和接口運(yùn)行相結(jié)合。程序存儲(chǔ)是控制軟件的能力。觸點(diǎn)數(shù)量是輸入點(diǎn)和輸出點(diǎn)的總和。 畢業(yè)設(shè)計(jì) (論文 )外文資料翻譯 系 部： 機(jī) 械工程系 專 業(yè)： 機(jī)械工程及自動(dòng)化 姓 名： 學(xué) 號(hào)： 外文出處： Process automation instrumentation 附 件： ； 。 PLCs 可以指定這些值的任何可能的組合。 用于可編程邏輯控制器的輸入設(shè)備包括 DC， AC，中間繼電器，熱電偶， RTD，頻率或脈沖，晶體管和中斷信號(hào)輸入；輸出設(shè)備包括 DC， AC，繼電器，中間繼電器，頻率或脈沖，晶體管，三端雙向可控硅開(kāi)關(guān)元件； PLC 的編程設(shè)備包括控制面板，手柄和計(jì)算機(jī)。 LD 是適用于離散控制和互鎖邏輯的圖表語(yǔ)言。 C 語(yǔ)言是一種高級(jí)編程語(yǔ)言，適用于處理最復(fù)雜的計(jì)算，連續(xù)的數(shù)據(jù)采集任務(wù)。正如圖 1 所示的計(jì)算機(jī)組成。 CPU 通過(guò)其他回路輸出數(shù)據(jù)。 輸出設(shè)備 — 監(jiān)控器就像指示燈。在解決梯形圖期間，輸出值只在臨時(shí)存儲(chǔ)器中被改變。 邏輯處理 /掃描 — 基于存儲(chǔ)器的輸入表格，程序被一次執(zhí)行一步，同時(shí)輸出值也被修正，這是其它節(jié)的集中。當(dāng)輸出值被掃描到 PLC時(shí)，他們將從存儲(chǔ)器復(fù)制到自然輸出設(shè)備。在圖中，梯形邏輯掃描將從最高層開(kāi)始。在邏輯掃描期間，輸出值只能在存儲(chǔ)器中被改變，只有當(dāng)梯形邏輯掃描完成時(shí)，實(shí)際的輸出才能被修正。 這些燈通常用于調(diào)試。 “ 第一次掃描 ” 輸入在梯形圖被第一次掃描時(shí)，將是對(duì)的，而在其余的每次掃描時(shí)是錯(cuò)誤的。它通常用于存放 PLC的操作系統(tǒng)。 EPROMS 也是 PLC 編程的比較好的選擇。這導(dǎo)致新的表達(dá)的模型發(fā)展，例如，計(jì)時(shí)的混合自動(dòng)機(jī)械裝置和新的方法，最特別地做模型檢查技術(shù)包括即時(shí)方面。這再一次給與我們實(shí)行個(gè)案研究的最佳化部份的機(jī)會(huì)，也是它自己功能的一種練習(xí)。 （ 3） 當(dāng)邏輯圖被掃描時(shí)，輸入的變化沒(méi)有被發(fā)現(xiàn) ,輸 出也沒(méi)有被修正。 (雖然，一些較新型 PLC 能夠達(dá)到 )他們也沒(méi)有屏幕聲音之類的輸出設(shè)備， .取而代之，他們有電壓 ,電流這樣的輸入設(shè)備和輸出設(shè)備。 power on this will be on whenever the PLC has power。 附件 2：外文原文 Programmable Logic Controllers (PLCs) 1 About Programmable Logic Controllers (PLCs) PLCs (programmable logic controllers) are the control hubs for a wide variety of automated systems and processes. They contain multiple inputs and outputs that use transistors and other circuitry to simulate switches and relays to control equipment. They are programmable via software interfaced via standard puter interfaces and proprietary languages and work options. Programmable logic controllers I/O channel specifications include total number of points, number of inputs and outputs, ability to expand, and maximum number of channels. Number of points is the sum of the inputs and the outputs. PLCs may be specified by any possible bination of these values. Expandable units may be stacked or linked together to increase total control capacity. Maximum number of channels refers to the maximum total number of input and output channels in an expanded system. PLC system specifications to consider include scan time, number of instructions, data memory, and program memory. Scan time is the time required by the PLC to check the states of its inputs and outputs. Instructions are standard operations (such as math functions) available to PLC software. Data memory is the capacity for data storage. Program memory is the capacity for control software. Available inputs for programmable logic controllers include DC, AC, analog, thermocouple, RTD, frequency or pulse, transistor, and interrupt inputs. Outputs for PLCs include DC, AC, relay, analog, frequency or pulse, transistor, and triac. Programming options for PLCs include front panel, hand held, and puter. Programmable logic controllers use a variety of software programming languages for control. These include IEC 611313, sequential function chart (SFC), function block diagram (FBD), ladder diagram (LD), structured text (ST), instruction list (IL), relay ladder logic (RLL), flow chart, C, and Basic. The IEC 611313 programming environment provides support for five languages specified by the global standard: Sequential Function Chart, Function Block Diagram, Ladder Diagram, Structured Text, and Instruction List. This allows for multivendor patibility and multilanguage programming. SFC is a graphical language that provides coordination of program sequences, supporting alternative sequence selections and parallel sequences. FBD uses a broad function library to build plex procedures in a graphical format. Standard math and logic functions may be coordinated with customizable munication and interface functions. LD is a graphic language for discrete control and interlocking logic. It is pletely patible with FBD for discrete function control. ST is a text language used for plex mathematical procedures and calculations less well suited to graphical languages. IL is a lowlevel language similar to assembly. code. It is used in relatively simple logic instructions. Relay Ladder Logic (RLL), or ladder diagrams, is the primary programming language for programmable logic controllers (PLCs). Ladder logic programming is a graphical representation of the program designed to look like relay logic. Flow Chart is a graphical language that describes sequential operations in a controller sequence or application. It is used to build modular, reusable function libraries. C is a high level programming language suited to handle the most plex putation, sequential, and data logging tasks. It is typically developed and debugged on a PC. BASIC is a high level language used to handle mathematical, sequential, data capturing and interface functions. Programmable logic controllers can also be specified with a number of puter interface options, work specifications and features. PLC power options, mounting options and environmental operating conditions are all also import