【正文】 example of the first case is ,a CELP (codedexcited linear predictor) speech codec. It allows good quality at low data algorithm requires about 30 times more putations per sample than PCM. Examples of number 2 are VoIP (voice over IP) applications where four channels are supported for SoHo (small office/home office) products， and up to 256 or more channels for CO (central office) products. Channel density is the key metric for VoIP processing. An example of the third case is the MPEG2 video pression algorithm applied to decode DVDs at different picture putational power is directly proportional to the video MPEG2 from NTSC (National Television System Committee) resolution to high definition requires not only a sixfold increase in processing power but new blue laser DVD technology for faster readout of the data from the addition, advancing VLSI permits the programmable architecture to reduce power and/or cost for a fixed algorithm at a fixed data technology conspires in many ways to move the boundary in favor of programmable DSPs. Applications that require highly specialized design today bee programs for inexpensive DSPs tomorrow。附錄A英文文獻(xiàn)DSPs Back to the Future[13]W. Patrick HaysPublished online： 23 June 2004Springer Science + Business Media . 2004AbstractOur plex world is characterized by representation, transmission, and storage of informationand information is mostly processed in digital form. With the advent of DSPs (digital signal processors), engineers are able to implement plex algorithms with relative ease. Today we find DSPs all around usin cars, digital cameras, MP3 and DVD players, modems, and so forth. Their widespread use and deployment in plex systems has triggered a revolution in DSP architectures, which in turn has enabled engineers to implement algorithms of everincreasing plexity. A DSP programmer today must be proficient in not only digital signal processing but also puter architecture and software engineering.Keywords　 DSP；Motor control systemThe Intel 2920 included onchip (D/A) digital/analog and A/D (analog/digital) converters but lacked a hardware multiplier and soon faded from the NEC project resulted in the NEC 181。 it would be disastrous if the processing of a sample took so long that after a few hours，the monitor was displaying fiveminuteold data. Not all digital signal processing applications require realtime applications are performed offline. For instance， encoding highfidelity audio for mastering CDROMs uses sophisticated digital signal processing algorithms， but the work isn’t done in ，a DSP isn’t required—any old processor fast enough for the engineer to get home for dinner will do. To summarize, the most important distinguishing characteristic of DSPs is that they process realtime signals—the signals can be fast or slow, but they must be . Do DSPs need to be programmable? No:it’s quite feasible to process digital signals without a programmable this article, however, DSP refers to programmable DSP—more specifically，to userprogrammable DSPs, because my bias is that that’s where the most interesting architectural issues lie. Often,the most demanding applications have required nonprogrammable architectures. For instance,firstgeneration programmable DSPs could execute a single channel of the 32Kbps ADPCM/DLQ,(adaptive differential pulse code modulation/dynamic locking quantizer) codec,whereas a special customintegrated circuit that was not programmable but deeply pipelined could run eight channels in the same reason for this is that programmability es at a cost：Every single operation in a programmable chip—no matter how simple—requires fetchdecodeexecute. That’s a lot of silicon area and power devoted to,say,shifting left by two bits. Nonprogrammable architectures succeed when the shiftleftbytwobits function is a small building block，allowing other building blocks to operate simultaneously. It’s easy to imagine many building blocks working simultaneously to achieve a 10x performance advantage in nonprogrammable problem with specialized DSP hardware is that you have to develop a new chip for each application. As development costs increase， the breakeven point is constantly shifting in favor of using a programmable Power. Higher clock speed permits more instructions to be executed during a fixed time interval. In 1980,the Bell Labs team struggled to run DSP1 at 5 MHz。 therefore,the realtime response rate is the (somewhat irregular) packet arrival rate. For example,80,000 packets per second are transmitted over 1 GigE (Gigabit Ethernet). MontaVista’s sponsored Linux preemptive kernel guarantees a worstcase kernel preemption latencyunder 1 millisecond on several guarantees an interrupt response of a few microseconds on a 500MHz DSP applications can often now be run under major realtime operating Siemens Tricore deserves recognition as one of the first RISCDSPs:“Tri”signifies that microprocessor，DSP， and microcontrol functions are bined in a mon processor. Intel and Analo