【正文】 s well as indicate to the Bus Master how many and what types of devices are present. After a ROM function sequence has been successfully executed, the memory and control functions are accessible and the mastermay then provide any one of the six memory and control function mands. One control function mand instructs the DS1820 to perform a temperature measurement. The result of this measurement will be placed in the DS1820’s scratchpad memory, and may be read by issuing a memory function mand which reads the contents of the scratchpad memory. The temperature alarm triggers TH and TL consist of one byte EEPROM each. If the alarm search mand is not applied to the DS1820, these registers may be used as general purpose user memory. Writing TH and TL is done using a memory function mand. Read access to these registers is through the scratchpad. All data is read and written least significant bit block diagram (Figure 1) shows the parasite powered circuitry. This circuitry “steals” power whenever the I/O or VDD pins are high. I/O will provide sufficient power as long as the specified timing and voltage requirements are met (see the section titled “1–Wire Bus System”). The advantages of parasite power are two–fold:1) by parasiting off this pin, no local power source is needed for remote sensing of temperature, 2) the ROM may be read in absence of normal power. In order for the DS1820 to be able to perform accurate temperature conversions, sufficient power must be provided over the I/O line when a temperature conversion is taking place. Since the operating current of the DS1820 is up to 1 mA, the I/O line will not have sufficient drive due to the 5K pull–up resistor. This problem is particularly acute if several DS1820’s are on the same I/O and attempting to convert simultaneously.There are two ways to assure that the DS1820 has sufficient supply current during its active conversion cycle. The first is to provide a strong pull–up on the I/O linewhenever temperature conversions or copies to the E2 memory are taking place. This may be acplished by using a MOSFET to pull the I/O line directly to the power supply as shown in Figure 2. The I/O line must be switched over to the strong pull–up within 10 ms maximum after issuing any protocol that involves copying to the E2 memory or initiates temperature conversions. When using the parasite power mode, the VDD pin must be tied to ground. Another method of supplying current to the DS1820 is through the use of an external power supply tied to the VDD pin, as shown in Figure 3. The advantage to this is that the strong pull–up is not required on the I/O line, and the bus master need not be tied up holding that line high during temperature conversions. This allows other data traffic on the 1–Wire bus during the conversion time. In addition, any number of DS1820’s may be placed on the 1–Wire bus, and if they all use external power, they may all simultaneously perform temperature conversions by issuing the Skip ROM mand and then issuing the Convert T mand. Note that as long as the external power supply is active, the GND pin may not be floating. The use of parasite power is not remended above 100176。C value, is incremented, indicating that the temperature is higher than –55176。C in 176。 it is important that each device on the bus be able to drive it at the appropriate time. To facilitate this, each device attached to the 1–Wire bus must have open drain or 3–state outputs.The 1–Wire port of the DS1820 (I/Opin) is open drain with an internal circuit equivalent to that shown in Figure 9. A multidrop bus consists of a 1–Wire bus with multiple slaves attached. The 1–Wire bus requires a pullup resistor of approximately 5KW.The idle state for the 1–Wire bus is high. If for any reason a transaction needs to be suspended, the bus MUST be left in the idle state if the transaction is to resume. Infinite recovery time can occur between bits so long as the 1–Wire bus is in the inactive (high) state during the recovery period. If this does not occur and the bus is left low for more than 480 ms, all ponents on the bus will be reset. TRANSACTION SEQUENCEThe protocol for accessing the DS1820 via the 1–Wire port is as follows:? Initialization? ROM Function Command? Memory Function Command? Transaction/DataINITIALIZATIONAll transactions on the 1–Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by presence 。C LSB, yielding the following 9–bit format:The most significant (sign) bit is duplicated into all of the bits in the upper MSB of the two–byte temperature register in memory. This “sign–extension” yields the 16–bit temperature readings as shown in Table 1. Higher resolutions may be obtained by the following procedure. First, read the temperature, and truncate the 176。C resolution. The temperature reading is provided in a 16–bit, sign–extended two’s plement reading. Table 1 describes the exact relationship of output data to measured temperature. The data is transmitted serially over the 1–Wire interface. The DS1820 can measure temperature over the range of –55176。 it will send back a “1” if it is powered from the VDD pin. If the master receives a “0”, it knows that it must supply the strong pull–up on the I/O line during temperature conversions. See “Memory Command Functions” section for more detail on this mand protocol.OPERATION – MEASURING TEMPERATUREThe DS1820 measures temperature through the use of an on–board proprietary temperature measurement technique. A block diagram of the temperature measurement circuitry is shown in Figure 4. The DS1820 measures temperature by counting the number of clock cycles that an oscillator with a low temperature coefficient goes through during a gate period determined by a high temperature coefficient oscillator. The counter is preset with a base count that corresponds to –55176。F to+257176。：北京航空航天出版社，2002[13] ：高等教育出版社，2002[14] 劉書明