外文翻譯---基于基于單片機(jī)進(jìn)行實(shí)時(shí)日歷和時(shí)鐘顯示設(shè)計(jì)-單片機(jī)(文件)
【正文】 Figure 2. External Clock Drive Configuration Idle Mode In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the onchip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution,from where it left off, up to two machine cycles before the internal reset algorithm takes control. Onchip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. Powerdown Mode In the powerdown mode, the oscillator is stopped, and the instruction that invokes powerdown is the last instruction executed. The onchip RAM and Special Function Registers retain their values until the powerdown mode is terminated. The only exit from powerdown is a hardware reset. Reset redefines the SFRs but does not change the onchip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. Program Memory Lock Bits On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below. When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly. 基于基于單片機(jī)進(jìn)行實(shí)時(shí)日歷和時(shí)鐘顯示設(shè)計(jì) 摘要 :日歷及時(shí)鐘顯示 以 AT89S52單片機(jī)為控制核心，采用 Dallas公司的 DS1302實(shí)時(shí)鐘芯片構(gòu)成計(jì)時(shí)電路，實(shí)現(xiàn)了時(shí)間和日期的顯示，還增加了溫度顯示和整點(diǎn)報(bào)時(shí)的功能。,39。, the problem. The chip has its own internal batterykeng,external brownout,the internal time information also be able to maintain for 10 years. Time for a single day record of 12 hours and there is a 24hour mode. Time Table Ways that also has two kinds of binary numbers,and the other with BCD code express. The chip with 128 bytes of internal RAM,one of 11 bytes used to store time information,4 bytes of memory chips used to control information,known as the control register,113byte generalpurpose RAM for users to store temporary information. In addition,users can also program the chip to control a variety of squarewave output,and its internal threeway through the software interrupt shielding. Buttons and temperature measurements and circuit The system in order to make the circuit more easy,button circuit design only three keys, which are 39。 Temperature measurement 1 Introduction Clock and calendarbedroom at home, schools, stations and more and more extensive use of plaza for people39。 畢業(yè)論文（設(shè)計(jì) ） 外文翻譯 學(xué) 生 姓 名： 指導(dǎo)教 師 ： 合 作 指 導(dǎo) 教 師 ： 專(zhuān)業(yè)名 稱(chēng) ： 自動(dòng)化 所在學(xué) 院 ： 2020 年 6 月 Design of single chip real time clock and calendar based on Abstract: This clock and calendar uses the AT89S52 microcontroller as the core for the control. Time Circuit which is con
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